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TPS650864: Request for schematic design review

Part Number: TPS650864


Tool/software:

Hi Team,

I'd like to ask you about the schematic design of TPS65086401. The output voltages of bucks and LDOs are default values of table 4-1 in the datasheet. But there are abnormal output waveforms on bucks(buck1/buck2/ buck6) and LDOs(LDOA1/LDOA2). Please check the attachment below and let me know how to resolve this issue.

Output waveforms of Bucks and LDOs.pdf

TPS65086401RSK_Schematic.pdf

Regards,

  • Hi,

    Because of the Thanksgiving holiday in the U.S., TI E2E design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.

    Br, Jari

  • Hi Jeffrey, 

    Thank you for your patience.

    Looking at the schematic, it appears that buck3 is not being used.
    If Buck3 is not being used, the recommended connections should be:

    • FB3 pin should be grounded, not floating
    • PVIN3 is still recommended to be connected to the V5ANA and bypassed to GND, not floating

    It appears the PMIC may be resetting due to detecting a fault, please ensure the above connections are fixed.

    Best Regards,
    Sarah

  • Hi Sarah,

    Thank you for your feedback. Let me check it with customer.

    Regards,