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LM25116: UVLO performance of the LM25116

Part Number: LM25116


Tool/software:

Dear Sir/Madam,

I am currently using a LM25116 to recieve voltage from an automtoive main battery (8V to 32V) and outptut a 5V supply (3 Amp max current).

The circuit works fine in our intended 8V to 32V input range. What we have noticed is that for input voltages below 8V the LM25116 will output voltages below 5V. This has an undesired effect that some downstream devices turn off before others.

When aproximatley 5.7V is applied the undervoltage lockout (UVLO) of the LM25116 kicks in and turns off the 5V output. 

My question is: How can I ensure that the LM25116 still ouptuts at least 4.6V even with lower supply voltages? Alternatively is there a way to completely kill the output voltage from the LM25116 at supply voltages below 8V ? I still need to ensure that the LM25116 outputs 5V when 8V-32V is applied to the LM25116. 

Below is my schemaitc. 

Note:

I was trying to improve thte UVLO performance of the LM25116. Using 0.1% 34.8 kOhm and 6.55 kOhm resistors but this still results in a worst case turn turn off voltage of 6.74V. 

Any suggestions would be greatfully recieved. 

  • Hello,

    When your input voltage falls below 8V, the device appears to be operating in dropout.

    Does your application require the device to operate when Vin<8V? If not, then you could set the UVLO externally to 8V. The datasheet example uses the minimum Vin as 7V (See Section 7.2.2.11 of the datasheet). 

    What is the minimum input voltage needed for this applicaiton?

    Best regards,

    Ridge

  • Hi Ridge,

    Thanks for replying to my question. In my application I must ensure that the LM25116 operates correctly from 8V and above. Ideally I would like to set the UVLO to be just under 8V to ensure that the LM25116 turns off at input voltages below 8V.

    The datasheet for the LM25116 (page 6) states that the UVLO threshold voltage for a rising input is 1.17V to 1.262V. UVLO hysteresis is typically 0.1V. 

    Does this mean that for a falling input the UVLO threshold is between 1.07V to 1.1262V?

    So for a rising input I need to ensure that when 8V is applied at least 1.262 V is present. For a falling input ULVO cut off will occur at a worst case, when a  voltage of 1.07V is present at the UVLO pin of the LM25116?

    Using Equation 25 from the datasheet I selected Ruv2 = 100 kOhm and Ruv1 = 18.7kOhm. This will ensure that LM25116 will operate at 8V for a rising input but results in a worst case falling input  shut off at 6.7V. 

    Is my math correct or is there a better way to improve the UVLO performance.

    Should I also set the CFT capacitor to not inserted?

     

  • Hello,

    After reviewing the schematic, the issue appears to be with the selected switching frequency. Your schematic is set to Fsw=1MHz based on the chosen RT resistor.

    This device has a minimum off-time specification with a maximum listed value of 580ns (see the Electrical Characteristics table in the datasheet).

    The maximum possible frequency for the highest necessary duty cycle, D = 5/8 for this application, is calculated as:

    Fsw_max = (1-D)/580ns = 646kHz. 

    To meet your Vin=8V requirement, you will need to reduce the switching frequency so that the device can maintain the proper duty cycle.

    Lowering the frequency will require the inductor, output capacitance, and compensation to change. You can use the Quickstart calculator to help with the design.

    Here is a calculator I filled in with some of your parameters to help get you started: 

    5482.LM5116_quickstart.xls

    Be sure to follow the design procedure with the specific requirements of your application. 

    Best regards,

    Ridge 

  • Hello,

    I am closing this thread due to inactivity.

    Best regards,

    Ridge