Tool/software:
Dears,
My customer used the TPS3436-Q1 watchdog chip in the S-ETH project. The OPN is TPS3436BFACADDFRQ1. The CWD pin was configured with a 15.5nf capacitor. The twc time should be 153ms and the two time should be 9667ms. However, during the actual test, when the CPU was stopped, the client occasionally found that the watchdog outputted the WDO signal to reset the CPU after 16s. Could you please help analyze what is the reason?
Many thanks,
Aeabella