TPS748A-Q1: Datasheet Spec Inquiry

Part Number: TPS748A-Q1

Tool/software:

Hi TI Expert,

Few questions about the TPS748A-Q1 would like to check with you:

1. About the ISHDN, why we have 0.8V VOUT when VEN is lower than 0.4V, that's the leakage from VIN or we just add extra power source on OUT on purpose?

Isn't the VOUT suppose to 0V when we measure the ISHDN?

2. Since we provide both output voltage tolerance and Line/Load regulation, if we want to know the VOUT based on certain condition, will we suggest customer to use the data in "output voltage tolerance" directly?

I'm not sure whether the data we provide in "output voltage tolerancealso consider the variation of internal VREF or Offset since it's a fixed output version.

In TPS748A-Q1 datasheet(adj), we provide VREF variation but also provide the VOUT Accuracy based on BIAS pin. 

So I'm confused about the relationship here.

Could you kindly share the reason that why we provide total VOUT accuracy in some datasheets but provide separate parameters in other datasheets?

Thank you.

  • Hi Evan, 

    1. You are correct Vout is 0V, however the resistor divider to set the output voltage is connected with values that would cause Vout=0.8V the the device were enabled. It doesn't affect the spec or performance when shutdown. 
    2. Yes you can use the output tolerance to know the accuracy of Vout. You can use the Line and Load Regulation specs to provide a more tailored spec that aligns closer with your use case since we can only put so many use cases in the data sheet. 
      1. for example if you wanted to estimate the accuracy for Iout=100ma, you could use the Output Voltage Tolerance at 1mA and add the Load Regulation that 100mA would cause.  So it would be 1%+0.003%/mA*99mA=1.3%. Note that there is some overlap in the conditions, so it won't be exact but it does give a good approximation. 

        3. For normal uses cases the output tolerance is what matters since the output tolerance accounts for all sources of error and you likely don't need to consider Vref tolerance. 

                   a. There are some uncommon use cases, such as parallel LDOs, where the Vref tolerance should be known but for a single LDO use cases it doesn't provide much                         benefit to know this info.