TPS650864: The power enable and power good of TPS6508641

Refer to the datasheet, when using TPS6508640, buck2 voltage is set by CTL6. When CTL6 is low, the BUCK2 voltage is set to 0.85V. As the same time, BUCK2 PG and CTL6 are parts of Power Good tree of GPO1 pin and GPO1 is connect to CTL4 to enable buck1. My confusion is whether GPO1 will continuously output a low level if I set CTL6 to low.

Hi Zhongfei,

For TPS6508641 device, default value of BUCK2_mask in register A4h (on page 89 of the datasheet) is 1, so BUCK2_PG is not part of power good tree of GPIO1 and is ignored. And also, the default value of GPO1_CTL6_msK  in register Ach (on page 97) is also 1, so CTL6 is not part of power good tree of GPIO1. So, you can use GPIO1 to enable BUCK1.

Sathish

Hi Sathish, I want to use TPS6508640 and buck2 want to set to 0.85V that's means CTL6 will pull low. But CTL6 is part of Power Good tree of GPO1 pin.

Hi Zhongfei,

For TPS6508640 the default voltage for Buck2 is 0.9V which means CTL6 has to be high. This is shown in the below application note on page 7.

https://www.ti.com/lit/an/scea113/scea113.pdf?ts=1734550758609&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTPS650864

Sathish

Hi Zhongfei,

I understanding it is confusing, but if you look at power good tree on page 51 of the datasheet, if CTL6_msk is set to 0, then GPOx PG depends on CTL6 pin status. However, since Buck1 enable is not dependent on CTL6 it will not affect Buck1 voltage. 

When CTL6 is high, Buck2 will be at 0.9V and when CTL6 is low Buck2 will be at 0.85V and Buck1 voltage is not affected by CTL6 status.

Hope that clarifies the confusion.

Sathish

Hi Zhongfei,

After thorough research, i came to notice that the bit names in register 0xACh are reversed, so GPIO1_CTL6_msK is bit1 instead of bit6.

So for TPS6508640 with GPIO1_CTL6_msK set to 1, CTL6 pin status is not part of power good tree of GPIO1.

Sorry for the confusion it has caused.

Sathish

That's great. Thanks for your reply

Will TI update the datasheet?