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TPS25947: Minimal off time need to configure in HW

Part Number: TPS25947
Other Parts Discussed in Thread: TPS25984B, TPS37-Q1, TPS25980, TPS3897, TPS3840-Q1

Tool/software:

Looking for a response to this thread.

Can the TPS25947 be configured / substituted to introduce a lock out time?

  • Hi Heath,

    It looks like EN cannot be controlled by uC with required delay time as it will be off in this application hence this question. I can suggest two things here, first is to use a quick output discharge circuit so that when the eFuse turns off, it discharge output caps also (I am assuming that eFuse is powering the SoC here). Secondly what is mentioned here, adding a delay element. Using RC will introduce the delay in turn on and turn off but if Vin goes below UVP threshold, device will turn off so turn off delay won't be a concern. RC for turn on will work but one concern I see is if the cap do not discharge completely before the next power up, the delay time will change. 

    I am not sure of any other method other than some type of slow charge delay block using caps + a pull down for discharge.

    Best regards,
    Arush

  • Thanks Arush,

    Yes that makes sense. But we are specifically interested in non-DIY options. Unfortunately we have insurmountable barriers to performing this sort of design work at this stage. Additionally, the timing requirements are onerous: we found that the TPS25947 can recover from a UVLO event in about 100µs! This is long enough to power cycle the downstream equipment (eg. the SoC) but well short of the few hundred milliseconds currently required to reset the power sequencing circuitry. Covering all load scenarios and power interrupt scenarios is challenging for an analog RC-based design.

    So we're investigating options for adding a UVLO delay, that prevents power being restored for some time. An ideal solution would be a pin-compatible variant of the TPS25947 with a UVLO delay feature! But if there's a substitute part or a known way to configure the TPS25947 to perform UVLO delay that would be great too.

  • Hi Heath,

    This is not very common requirement and in most use case, delay is not required from the EN/UVLO pin. So we do not have any part with 100us delay in built. some server parts need startup delay for glitch free startup but that is around 13ms delay in case of TPS25984B (high current eFuse without reverse current blocking) and this part is overkill for your application. You can still check this. 

    If we need to implement any delay internally in the devices, we use current sources and capacitor and comparator. This is how blanking timer (itimer) is implemented inside the device.

    I think this is not very helpful but I am just sharing what I can.

    Best regards,
    Arush

  • I guess commonality depends on your perspective. A casual survey of TI's own parts shows that all these have a reset delay function:

    - TPS25984B (as you mentioned)
    - TPS25947A (the very part in question, but alas only for thermal overload trips)
    - TPS37-Q1
    - TPS25980
    - TPS3897
    - TPS3840-Q1

    Certainly in my experience designing with dozens of different power supply supervisors over the decades, a defined reset delay specification was so common that I've come to expect it's a standard feature to prevent power supply chatter, and designed accordingly. I have less experience with eFuse IC's, so perhaps there's a different expectation at play there.

    Regardless, the info you've provided **is** helpful and I appreciate it. Even if the TPS25947 doesn't have a variant with the behaviour we need, I'm still holding on to hope that there's a suitable substitute. In my hurried list above half are supervisors, but the TPS25980 is an eFuse. Maybe there's an option out there.

    Or maybe the right solution is a RC filter on the UVLO pin itself, to prevent a fast recovery. This was my original preference, but not being familiar with the part I was overruled by those closer to the design. Is this a practical technique?

  • Hi Heath,

    I was ooo for past 2 weeks hence the delay in my response. I apologies for that.

    Here I just want to mention the difference between insertion delay and retry delay.

    Insertion delay is when your Vin and EN goes high and the intentional time delay for Vout to go high.

    Retry delay is when Vout is cut-off due to some fault and device will perform retry/startup after some the retry delay. 

    From our previous exchange, I thought you want insertion delay hence did not mention TPS25980. Also TPS25947 have 110ms retry delay but I don't think that is helping here.

    Or maybe the right solution is a RC filter on the UVLO pin itself, to prevent a fast recovery. This was my original preference, but not being familiar with the part I was overruled by those closer to the design. Is this a practical technique?

    Yes, this can be used but will require evaluation/testing.

    Best Regards,
    Arush

  • From our previous exchange, I thought you want insertion delay

    Ah, no, your description of retry delay is what we're after. We don't want power re-applied too quickly.

    The TPS25947's retry delay is exactly what we want! Alas it seems to only apply to overvoltage and overcurrent trips, not undervoltage trips.

    If there's a way to get the TPS25947's retry delay to apply to undervoltage trips as well (even just mild ones, above Vsd) we'd love to know. Or an otherwise equivalent part that has this feature.

  • Hi Heath,

    The device is designed with undervoltage as a required condition for internal switch enable and overcurrent as a fault state. Internally both are treated differently so it is not possible with this device or with most of the devices to trigger retry delay for the undervoltage condition. TPS25980 will also not give retry delay for undervoltage condition.

    I am unable to think of any simple solution using external circuit to implement this. 

    Best Regards,
    Arush