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LP5912: LDO without UVLO as supercap charger

Part Number: LP5912

Tool/software:

Hi,

I am looking for LDO without UVLO that would (ideally) passthrough the Vin to Vout when Vin < Vmin. Or, at least guarantee monotonic startup (no on-off UVLO oscillations)

The purpose of the circuit is to work as a small (30mf) supercap charger. It is powered by the low power wireles charger which delivers about 50mA @ 1.6v, 10mA @3.3V and about 1ma@7V.

So, in order to charge as fast as possible I need to passthrough eveything below LDO's Vmin. It is a high density app, package area should be < 5mm2 Output voltage 3.3V

It seems that LP5912 fits the description but the datasheet is a bit vague on what happens below Vin exactly:

Page19>>>The device internal circuit is not fully functional
until VIN is at least 1.6 V. The output voltage is not regulated until VIN has reached at least the greater of 1.6 V or
(VOUT + VDO).

Could you clarify what "not fully functional" means please?

Will LP5912 be stable with (1uF (ceramic) + 30mF supercap) load connected by schottky diode (to reduce leakage)?

Thanks,

Alex

  • Hi Alex,

    I am looking for LDO without UVLO that would (ideally) passthrough the Vin to Vout when Vin < Vmin. Or, at least guarantee monotonic startup (no on-off UVLO oscillations)

    From this my understanding of what you've described is that you want the LDO to pass through the input voltage to the output voltage instead of regulating the output voltage. Can you confirm or clarify if that's not correct? If you want to pass the input through to the output, stability is not a concern. If you do intend to use the device in regulation, what output voltage would you use? If there's a Schottky diode at the output and the input is 1.6V that does not leave a whole lot of voltage left to charge the supercap if the output is also regulating. 

    Could you clarify what "not fully functional" means please?

    It's likely the case that there is not enough VGS (which is the error amp output minus VIN and is maximized when the error amp output is pulled to ground) to turn on the pass FET enough to regulate. I think if the device is able to partially turn on when VIN < 1.6V the dropout will just be larger because of this. It's difficult to say how the other blocks behave, but this one will likely be true regardless. 

    Will LP5912 be stable with (1uF (ceramic) + 30mF supercap) load connected by schottky diode (to reduce leakage)?

    If the device is operated in regulation mode it's difficult to say whether it will be stable with 30mF supercap because we don't have data for it. The datasheet does not mention a maximum output capacitor so that could be good news, but we would need to test or simulate it. Do you know what the impedance over frequency looks like for the supercap?

    Regards,

    Nick

  • Hi Nick,

    Thanks for getting back to me on this.

    NB>>From this my understanding of what you've described is that you want the LDO to pass through the input voltage to the output voltage instead of regulating the output voltage. Can you confirm or clarify if that's not correct? If you want to pass the input through to the output, stability is not a concern. If you do intend to use the device in regulation, what output voltage would you use? If there's a Schottky diode at the output and the input is 1.6V that does not leave a whole lot of voltage left to charge the supercap if the output is also regulating. 

    AK>>Yes, I don't want/need LDO to regulate when input voltage is below the output set voltage which is 3.3V. Schottky is very low dropout, so at 1.6V of the input it could supply 1.3V @ 50ma to the supercap. In the nutshell, I am looking for an ideal voltage limiter. When Vin is less than Vreg, it passes everything to the output. When supercap is charged enough that input current drops below 10ma (input voltage gets > 3.3V), the part must start regulating and clamp the output to 3.3V. When supercap is fully charged, the input voltage will climb to 7v approx(I can regulate Vin max by dumping current via ballast resistor), the output must stay at 3.3v - no overshoots.

    NB>>It's likely the case that there is not enough VGS (which is the error amp output minus VIN and is maximized when the error amp output is pulled to ground) to turn on the pass FET enough to regulate. I think if the device is able to partially turn on when VIN < 1.6V the dropout will just be larger because of this. It's difficult to say how the other blocks behave, but this one will likely be true regardless.

    AK>>So it is likely that FET might behave as a current limiter in this scenario. Bummer.

    NB>>If the device is operated in regulation mode it's difficult to say whether it will be stable with 30mF supercap because we don't have data for it. The datasheet does not mention a maximum output capacitor so that could be good news, but we would need to test or simulate it. Do you know what the impedance over frequency looks like for the supercap?

    AK>>Unfortunately I don't have an impedance plot over the frequency. At DC it is about 20 Ohms.

    Thanks,

    Alex

  • Hi Alex,

    Sorry for the delay, but I will have to wait until Monday to get back to you on this. Thank you for your patience. 

    Regards,

    Nick

  • No worries Nick.

    Actually I realised that have been overthinking this whole thing as a simpler solution is available.

    I am closing this issue - thanks for your help.

    Cheers,

    Alex