TPS65994AE: TPS65994BH in Winodws 24H2 device manager show UCM-UCSI ACPI Device yellow bang

Hi,

Please provide I2C log of UCSI command transactions so we can investigate. Thank you.

Best,

Alex

TPS65994BH_UCSI.csvHi Alex,

I2C log as attached.

Hi Michael,

After reviewing the logs, I don't see any UCSI commands sent from the EC to the PD controller. Please make sure the I2C log was captured correctly, when the UCSI failure is seen. I expect the see a UCSI PPM_RESET command in the I2C log, but I don't see this.

Also, many UCSI issues including these YB issues are EC related. Please also investigate this from an EC perspective, to check if it is issuing the UCSI commands properly.

Best,

Alex

 UCSI_PASS.csvUCSI_FAIL.csv

Hi Alex,

Thanks for the reply, I resend the I2C log with & without YB, please help to check.

Hi Michael,

From logs, EC enables the PD's CMD1 Complete (bit 30) I2C1 interrupt mask, then issues the UCSI PPM_Reset command, then checks for CMD1 Complete (bit 30) interrupt assertion from PD to know when the command is done. In fail case, EC never receives CMD1 Complete interrupt on I2C1 from PD, so this command does not complete, and YB occurs.

We will investigate this issue internally. Can you clarify a few items for us.

1. What are the setup differences between pass and fail case? Is there a fail rate or is there some setup change between pass and fail?\
2. Is there any device connected to the Type-C port when UCSI PPM_Reset command is issued and YB is seen?

Best,

Alex

Hi Alex,

1. Is fail rate, no setup diff between pass & fail cases.

2. No device connected.

Thanks Michael.

We will discuss this and provide an update.

Best,

Alex

Hi Alex,

We found that interrupt on I2C from PD was triggered when no device connected, do you have any idea?

Hi Michael,

I2C interrupt can trigger for many reasons, not necessarily only when a device is connected. Which interrupt is triggering?

Best,

Alex

Hi Michael,

We did not see any issues with CMD1 Complete interrupt for any UCSI commands in our testing. Can you modify EC to poll the 0x08 CMD register instead of checking for the I2C1 interrupt? Or adding the read of PD 0x08 CMD register regardless of CMD1 complete interrupt. This would ensure any issues with the I2C interrupt would not impact notification of command completion to EC. This would also allow us to determine whether the issue is the UCSI command or the I2C interrupt, as we are not sure since we have not been able to reproduce this.

Best,

Alex