TPS7A4701-EP: want to have stable 1.8V (500mA) output.

Hi Pratik,

The schematic is configured properly, and I suspect that it's a thermal issue potentially due to board layout. In this application there is 1.6W dissipated in the device. If the board layout for this device is similar to the JEDEC High-k board layout used in JESD51-7, you can expect approximately 52C junction temperature rise relative to the ambient temperature. If the board layout is less thermally optimized, the junction temperature can rise more than this, and conversely, if the board layout is more thermally optimized than this, the junction temperature can rise less than this. What is the ambient temperature in your application? Can you share a screenshot of the layout near the device? How many layers is the board? 

Regards,

Nick

Thank you,

Operating at Ambient room temperature "25* c" 2 layers board with heat pad at the bottom "No IC placed at bottom", Please find the sceenshot.

Hi Pratik,

I don't see any vias underneath the thermal pad. Are there any that are hidden? If not, this device will have poor thermal performance because there isn't anywhere for the heat to go. 2-layer boards are tricky in general when there is a relatively high power dissipation since there aren't any internal layers to help spread heat, so the top- and bottom-layer copper are the only heatsinks to help remove heat, and since this device has leads on all sides it's mostly the bottom-layer copper that can get rid of heat, and if there are no thermal vias connecting to the bottom layer, the heat stays trapped on the top layer. 

Regards,

Nick

Thank you, for your suggestion " I have not placed vias under the thermal pad i will add those in the next iteration."

Are there any alternative of TPS7A4700-EP, that I can test.

Thank you Nick.