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TPS2556: AutoRetry circuit : necessity of Cretry

Ryuuichi machida
Guru 12610 points
Part Number: TPS2556
Other Parts Discussed in Thread: TPS2557, TPS2559

Tool/software:

Hi,

We are configuring "AutoRetry" circuit on TPS2556 by refering section "10.2.1.2.3 Auto-Retry Functionality" of datasheet.
However, We now do NOT implement "Cretry" capacitance.
According to above section, this capacitance is used to control "auto-retry" time, however, I would like you to confirm whether it is OK that we do not implement this capacitance or not.
Our concern is whether oscillation will be happened when we control "auto-retry" time too fast.
Could you please confirm about above cirucuit and give me comment if any concern exist ?

Best Regards,

  • 0
    TI__Genius 10765 points

    Hello,

    To clarify, the auto-retry circuit will only work for active-high device TPS2557.  TPS2556 is active-low.

    I don't have a TPS2557 on hand to check, but I have a sister product, TPS2559.  When I short FAULT to EN,  I the auto retry function works, but the timing is a function of the load.  When FAULT goes LOW to indicate overcurrent, the switch will immediately turn off the output.  Once VOUT is 0, FAULT will change to HI-Z and thus re-enable the device.  After tON, the output will try to rise again.  For a lower resistance and/or lower output capacitance, VOUT will decrease faster, meaning FAULT remains low for a shorter period of time.  For a greater resistance or greater output capacitance, VOUT will decrease slower, thus staying FAULT/EN remain LOW for longer.

    I will order a TPS2557 EVM to verify it is consistent to TPS2559.

    Regards,
    Eric

  • 0 in reply to Eric Hartigan
    Guru 12610 points

    Hello Eric,

    >To clarify, the auto-retry circuit will only work for active-high device TPS2557.  TPS2556 is active-low.
    Yes, I know. So, I added logic between "Faultn" and "ENn" to realize "auto-retry" function.

    > For a lower resistance and/or lower output capacitance, VOUT will decrease faster, meaning FAULT remains low for a shorter period of time.
    Yes. What we would like you to confrm whether there is possibility that device will oscilate under lowest output cap(no cap load). (From viewpoint resistance, pull up resister must be required. so there is no case about no load.)
    Is it possible to comment about above ?

    Best Regards,

  • 0 in reply to Ryuuichi machida
    TI__Genius 10765 points

    Hello,

    I will have to depopulate COUT once the EVM arrives and check.  I expect the turnoff time to be effectively immediate, then VOUT will attempt to rise after tON.

    To clarify, you want to see auto-retry with R_pullup on EN/FAULT, no C_retry, no C_OUT?

    Thanks,
    Eric

  • 0 in reply to Eric Hartigan
    Guru 12610 points

    Hi Eric,

    >To clarify, you want to see auto-retry with R_pullup on EN/FAULT, no C_retry, no C_OUT?
    Yes, our circuit will use pull up resistor 100k ohm to connect 3.3V and "Faultn" and we do not implement any capacitance component (Faultn is connected to only "Nch" FET Gate and Inverter input.)

    Best Regards,

  • 0 in reply to Ryuuichi machida
    TI__Genius 10765 points

    Understood.  OUT pin does not have any capacitance as well?  This will affect the test.

    Thanks,
    Eric

  • 0 in reply to Eric Hartigan
    Guru 12610 points

    Hi Eric,

    >OUT pin does not have any capacitance as well?  This will affect the test.
    For above, we have two cases.
    First one is "150uF" capacitance is implemented to follow USBHUB requirement.
    And second one is "4.7uF" capacitance is implemented for decoupling. This case VBUS is controled by USB-Type C controller.

    Best Regards

  • 0 in reply to Ryuuichi machida
    TI__Genius 10765 points

    Okay.  I can check this once boards arrive.  It will be 3-5 business days to ship to my office.

    Regards,
    Eric

  • 0 in reply to Eric Hartigan
    Guru 12610 points

    Hello Eric-san,

    >Okay.  I can check this once boards arrive.  It will be 3-5 business days to ship to my office.
    Do you have any update about above ?

    Best Regards,


  • 0 in reply to Ryuuichi machida
    TI__Genius 10765 points

    Not yet.  I'll give you an update after they arrive.

    Regards,
    Eric

  • 0 in reply to Eric Hartigan
    Guru 12610 points

    Thank you for your reply. OK I will wait for your feedback.

    BR,

  • 0 in reply to Ryuuichi machida
    TI__Genius 10765 points

    Hello,

    I had an opportunity to test tRetry without CRetry this afternoon.

    As expected, the period of the retry cycle changes based on the load condition.  This is because a lower resistance on VOUT will cause a faster discharge, which means less time that the fault signal is low.

    Around 400-500mOhm, there is inconsistency in the retry cycle.  Sometimes is it ~20ms, other times it will be ~5ms.  This is true with a direct short from VOUT to GND as well.  For this reason, I advice using CRetry to control a minimum off time.

    In the attached scope waveform, C1 is IN, C2 is OUT, and C3 is /FAULT (which doubles as EN).  I am including this to demonstrate the inconsistent retry timing with OUT shorted to GND and no Cretry.

    Regards,
    Eric

  • 0 in reply to Eric Hartigan
    Guru 12610 points

    Hello Eric-san,

    Thank you for your reply.
    I have following questions.

    Q1 Which portion does following resistor value show ?
    >Around 400-500mOhm, 

    Q2 Which setting did you apply for "Cout" (In my case, I explained "4.7uF" and "150uF" on previous therad.)

    Q3 Could you show "low" period of "faultn" signal ? ("us" order ?)

    Q4 According to datasheet, this device has "deglitch" time approx 8 - 9ms.
    you said lowest cycle is "5ms". I think that it's to short compared to above "deglitch" time. What do you think about this ?

    BR, 

  • 0 in reply to Ryuuichi machida
    TI__Genius 10765 points

    I was considering easier ways to go about this.  Why not skip the auto-retry circuit entirely?  The circuit is designed to retry automatically so long as EN signal is set to the enabled state.  See datasheet figure 9-7 for an example.  Would that suit your needs?

    I'm not comfortable proceeding with collecting data on a single unit for these purposes.  There is going to be unit-to-unit variation.  Your circuit without Cretry seems to be functional but I can't guarantee the behavior any further.

    Regards,
    Eric

  • 0 in reply to Eric Hartigan
    Guru 12610 points

    Hello Eric-san,

    >Would that suit your needs?
    We understand behavior of this device case of "fault" condition.
    Under this understanding, we consider we would like to add this "auto retry" circuit.

    I want your opinion about below.

    * When we implement Cretry(For example, 0.22uF which is shown in datasheet), do you also think that we can observe this unstable retry cycle ?

    By the way, I could not find "figure 9-7" which you described in datasheet. Which figure did you point ?

    Best Regards, 

  • +1 in reply to Ryuuichi machida
    TI__Genius 10765 points

    Hello,

    With Cretry, the re-enable is delayed based on RC time constant from VIN to EN to GND, so it will be stable.

    Here is figure 9-7.  EN is held in the enabled state for the entire capture.

    Regards,
    Eric