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TPS65251: FPGA shutdown sequence

Kaji@PAN
Mastermind 7795 points
Part Number: TPS65251

Tool/software:

Hello,

I work as an FAE at a distributor that handles TI products, and I received a question from a customer about the TPS65251.
The TPS65251 is used as a power supply for the FPGA Spartan7.
There are no problems with the start-up sequence, but my customer has concerns about the power-down sequence.
The concern is that if the TPS65251 power supply drops before the output voltage, the TPS65251 will not be able to control the power-down sequence.
Can you provide an example of a power-down sequence circuit that can deal with this?

Best regards,

  • +1
    TI__Expert 5470 points

    Hi Kaji,

    This device is a buck converter which converts the power from input to output for voltage step down. So in other words, if the Vin power source is removed and no longer exists, it doesn't have the supply for power conversion. From the operating mechanism, when Vin drops below a voltage equaling to (Vout - Vdiode), the bode diode of high side Power MOS will conduct and discharge Vout to Vin. The body diode conduction is uncontrollable, so once Vin drops below (Vout-Vdiode) or drops below UVLO threshold for buck shutdown, the output of buck is not in control.

    So customer needs to shutdown the all channels through EN control before Vin power supply is removed. Maybe customer's issue is when buck shutdown with EN, there's not enough load current to discharge the energy stored in output cap, so the output voltage doesn't drop (or drops very slowly) when EN is already pulled low. If that's the case, customer needs to design some active discharge circuit for shutdown sequence.

    If that's not case, please help to provide a schematic and detailed description of customer's circuit logic for power down control.

    Thanks,

    Andrew