TPS62290-Q1: TPS62290TDRVRQ1

Hello,

The question/issue is not clear to me. Please provide the schematic, layout and scope plots to explain the problem.

Thanks,

Febin

Please note the voltage drop when connecting the display

display is max 250 mA, the PSU is 1A

Do you recognise theeffect?

We designed the diagram from TI includung the right lay-out

IMG_2454 (1).zip

Hello Anton,

Thanks for the video file. However, which voltage is this? Is it Vout?

I would need the schematic to understand better.

I need to see scope plots for Vin, Vout, Vsw, Load current/inductor current to start with.

Thanks,

Febin

0552.storing 3V3 circuit.pdf

Hi Febin

See attsached.

Regards

Anton

Hi Anton,

Thanks for sharing the files. The problem description is clear. 

I have a couple of questions:

- What is the CPU load? I assume the display load ~250 mA is in addition to the CPU load.

Would you be able to capture the Inductor current at this point when the display is active.

- I assume there is no other device connected to this 3.3V rail except the CPU and display.

- Another thought, could there be any possibility of undamped input filter in this case? Have you tried to test without the input filter?

- Would you be able to share the layout with us?

Thanks, 

Febin

Hi Anton,

Please also share the complete schematic and layout showing the load to the TPS62290-Q1.

Please also clarify your exact measurement points for Vin, Vout.

Thanks, 

Febin