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Original question:

LMG3100R017: SIMPLIS/PLECS simulation model

LMG3100R017: LMG3100R017 reference design

ETHAN ZHOU
Prodigy 40 points
Part Number: LMG3100R017
Other Parts Discussed in Thread: PMP23421, LMG3100EVM-089

Tool/software:

Hi Ti engineers,

When I am doing LMG3100R017 reference design having some questions

LMG3100EVM-089 design

it use low side bootstrap directly as the power supply of upper one to driver the upper gan

upper chip HB HS HO floating

Schematic — PMP23421 design 

I have following questions compared these two designs:

1、I notice digital isolated power was used in this design I wonder why not design like LMG3100EVM-089 design and add one extra digital isolator 

2、upper chip one bootsrap is added i also wonder why?

3、if I want to use series  cap buck converter  could you please provide the  best driver reference design for this topology? smaller size will be prefer.

  • 0
    Prodigy 40 points

    and how to design uperside HI pin one is connected to SW one is floating

  • 0 in reply to ETHAN ZHOU
    TI__Expert 4510 points

    Hello,

    Bellow are answers to your questions:
    1. LMG3100 can be configured to input both LI/HI signals through low-side device. The low-side device will internally level-shift the HI signal and output it for the high-side device. Diagram:

    This configuration will result in large propagation delay for the HI signal, which is troublesome for high frequency designs. The reference designed you shared uses a digital isolator for the high-side input signal to avoid this propagation delay.

    2. This capacitor on high-side FET is not necessary, and does not need to be included in this schematic. It is a mistake. There are no problems that will arise but it is unnecessary as shown in the datasheet

    3. Please allow me to follow-up on this point early next week

    4. You ask "and how to design uperside HI pin one is connected to SW one is floating" . Can you elaborate on this question more please?

    Thanks,
    Zach S