TPS48110Q1EVM: TPS48110-Q1_PSPICE_TRANS not working

mohamed ElHammady

Part Number: TPS48110Q1EVM

Tool/software:

Hi,
I downloaded this model form your website, imported it using Ppsice Model editor. I inculded the lib in simulation settings. I am still getting this error that this device can noz be simulated.
do I need an unencrypted model for Pspice, how to solve this problem ?

2 months ago

0 mohamed ElHammady 2 months ago

Prodigy 80 points

How can I get unencrypted model ?

0 Sarah Raines 2 months ago in reply to mohamed ElHammady

TI__Expert 5440 points

Hi Mohamed,

Please try the below unencrypted version.

Thank you,

Sarah

TPS48110-Q_unencrypted.zip

0 mohamed ElHammady 2 months ago in reply to Sarah Raines

Prodigy 80 points

Hi Sarah,
Thanks for the Model, now I am getting convergence issues and don't know how to solve it. can you please take a look ?
attached you will find my work folder.High side driver.zip

Thanks!
Mohamed

0 mohamed ElHammady 2 months ago in reply to mohamed ElHammady

Prodigy 80 points

7360.High side driver.zip
I tried updating some values but still the same error.

0 Sarah Raines 2 months ago in reply to mohamed ElHammady

TI__Expert 5440 points

Hi Mohamed,

Have you added the .lib and .olb files to the project (you can drag and drop into the project library sections), or pointed the simulator to the .lib file?

Thank you,

Sarah

0 mohamed ElHammady 1 month ago in reply to Sarah Raines

Prodigy 80 points

I pointed the simulator to .lib file

0 Sarah Raines 1 month ago in reply to mohamed ElHammady

TI__Expert 5440 points

Hi Mohamed,

A few things: I tried this today without issue using the exact files I sent you.

Can you confirm you are not using LTSPICE?
In my session log prior to the netlist creation I can see the Library identified and "updated". Do you see something similar?
I also see you are referencing the library twice in your configuration window. Can you delete one to make sure this isn't an issue?
Lastly, the netlist you are creating is called "schemtaic1.net". Can you verify operation using the startup simulation provide in the folder?

Thank you,

Sarah

0 mohamed ElHammady 1 month ago in reply to Sarah Raines

Prodigy 80 points

Hi Sarah,
I am using Pspice, I only have one. when I opened the startup simulation file in the unencrypted version. and pressed RUN it converged but it was too slow, will this simulation file follow the simulation setting I already put ? is this expected ?
I still don’t understand why my normal simulation setting does not work I will paste below what I get, if you have any ideas what the problem might be.

** Creating circuit file "Test.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS

*Libraries:
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of C:\Users\mohamed.elhammady\cdssetup\OrCAD_PSpice\17.2.0\PSpice.ini file:
.lib "C:\Users\mohamed.elhammady\Desktop\High side driver\TPS48110-Q_unencrypted\TPS48110-Q1_PSPICE_TRANS\TPS48110-Q1_TRANS.lib"
.lib "C:\Users\mohamed.elhammady\Desktop\High side driver\Infineon-Automotive_OptiMOS_5_80V-SimulationModels-v04_00-EN\OptiMOS_5_80"
+ "V\OptiMOS_5_80V_PSpice.lib"
.lib "nom.lib"

*Analysis directives:
.TRAN 0 800ms 0
.OPTIONS ADVCONV
.PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"

**** INCLUDING SCHEMATIC1.net ****
* source HIGH_SIDE_DRIVER
X_X4         VS N08556 VOUT N07288 N03264 IAUA250N08S5N018 PARAMS: Ld=0.7n
+ Lg=0.1n Ls=0.05n dC=0 dRdson=0 dVbr=0 dVth=0 dZth=0 dgfs=0
X_Q1         DIODE DIODE 0 awbmmbt3904 PARAMS:
+
R_R1         EN_UVLO VS 976k TC=0,0
R_R2         OV EN_UVLO 16.2k TC=0,0
R_R3         0 OV 20.5k TC=0,0
R_RIWRN         IWRN 0 49k TC=0,0
R_RSNS         CS_MINUS VS 0.1m TC=0,0
R_RSET         CS_PLUS VS 100 TC=0,0
R_R7         FLT_I_B VS 10k TC=0,0
R_R8         FLT_T_B VS 10k TC=0,0
R_RIMON         IMON 0 15k TC=0,0
R_RISCP         VS ISCP 1.33k TC=0,0
C_CTMR         0 TMR 33n TC=0,0
C_CLOAD         N005180 VOUT 1m TC=0,0
C_CBST         BST VOUT 680n TC=0,0
V_VbATT         VS 0
+PULSE 40 40 1m 1m 1m 400m 450m
R_RINP         INP VS 1k TC=0,0
R_RESR         N005180 0 0.2 TC=0,0
V_V2         N03264 0 23
X_U1         BST CS_MINUS CS_PLUS DIODE EN_UVLO FLT_I_B FLT_T_B 0 IMON INP ISCP
+ IWRN VOUT OV OV OV VOUT TMR VS TPS48110-Q1_TRANS
C_CFLT_T         0 FLT_T_B 1p TC=0,0
C_CTJ         0 N07288 1p TC=0,0
R_RINRUSH         OV N08556 100k TC=0,0
R_Rinruhs2         N085881 N08556 10 TC=0,0
C_CINRUSH         0 N085881 150n TC=0,0

**** RESUMING Test.cir ****
.END

**** 02/13/25 08:11:09 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********

** Profile: "SCHEMATIC1-Test" [ c:\users\mohamed.elhammady\desktop\high side driver\workfolder\high_side_driver-pspicefiles\schemat

****     Diode MODEL PARAMETERS

******************************************************************************

               d_d1            X_U1.X_U5_U6.D_D1
          IS    1.000000E-15    1.000000E-15
           N     .01             .01
          RS     .05             .05
          TT   10.000000E-12   10.000000E-12

               X_U1.X_U5_U5.D_D1
          IS    1.000000E-15
           N     .01
          RS     .05
          TT   10.000000E-12

               X_U1.X_U5_U721.d_d1
          IS    1.000000E-15
           N     .1
          RS    5.000000E-03
          TT   10.000000E-12

**** 02/13/25 08:11:09 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********

** Profile: "SCHEMATIC1-Test" [ c:\users\mohamed.elhammady\desktop\high side driver\workfolder\high_side_driver-pspicefiles\schemat

****     BJT MODEL PARAMETERS

******************************************************************************

               X_Q1.model4
               NPN
       LEVEL    1
          IS   10.000000E-15
          EG    1.11
          BF 360
          NF    1
         VAF   62.5
         IKF     .05
         ISE 250.000000E-15
          NE    1.55
          BR     .4842
          NR     .9657
         VAR   28.3
         IKR     .08
         ISS    0
          RB    1.14
         RBM    1.14
          RE     .745
          RC    1.2
         CJE    4.541300E-12
         VJE     .1037
         MJE     .1514
         CJC    3.664800E-12
         VJC     .4339
         MJC     .2218
        XCJC    1
         CJS    0
         VJS     .7
         MJS     .5
          TF 392.100000E-12
         XTF    1
         VTF 500
         ITF     .2
          TR 670.000000E-09
         XTB    1.5815
          KF    0
          AF    1
          CN    2.42
           D     .87

**** 02/13/25 08:11:09 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********

** Profile: "SCHEMATIC1-Test" [ c:\users\mohamed.elhammady\desktop\high side driver\workfolder\high_side_driver-pspicefiles\schemat

****     Voltage Controlled Switch MODEL PARAMETERS

******************************************************************************

               X_U1.X_U3_S1._U3_S1
         RON    3
        ROFF    1.000000E+09
         VON     .6
        VOFF     .4

               X_U1.X_U3_S2._U3_S2
         RON    3
        ROFF    1.000000E+09
         VON     .6
        VOFF     .4

               X_U1.X_U5_S1._U5_S1
         RON   70
        ROFF    1.000000E+12
         VON     .6
        VOFF     .4

               X_U1.X_U5_S2._U5_S2
         RON    1.000000E-03
        ROFF    1.000000E+12
         VON     .6
        VOFF     .4

               X_U1.X_U5_S3._U5_S3
         RON    1.000000E-03
        ROFF    1.000000E+09
         VON     .6
        VOFF     .4

Starting pseudo-transient algorithm.

ERROR -- Convergence problem in transient bias point calculation

Last node voltages tried were:

NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE

(   OV)     .3751 (   VS)   40.0000 ( BST)    -.0066 ( INP)   39.9600

( TMR) 2.800E-09 ( IMON) 600.0E-09 ( ISCP)   39.9800 ( IWRN) 1.960E-06

( VOUT)     .3751 (DIODE)-442.2E-30 (N03264)   23.0000 (N07288)   23.0000

(N08556)     .3748 (X_X4.g)     .3748 (X_X4.s)     .3751 (CS_PLUS)   40.0000

(EN_UVLO)    1.0221                   (FLT_I_B)   40.0000

(FLT_T_B)   40.0000                   (N005180) 4.280E-06

(N085881)     .3748                   (X_X4.d1)   40.0000

(X_X4.d2)   40.0000                   (X_X4.g1)     .3748

(X_X4.s1)     .3751                   (X_X4.sp)     .3751

(X_X4.t1)   23.0000                   (X_X4.t2)   23.0000

(X_X4.t3)   23.0000                   (X_X4.t4)   23.0000

(X_X4.Tb)   23.0000                   (CS_MINUS)   40.0000

(X_U1.WARN)    0.0000                 (X_U1.U4_IT) 86.04E-12

(X_X4.X_1.d)   40.0000                (X_X4.X_1.s)     .3751

(X_U1.FET_ON)    1.0000               (X_U1.OV_INT)     .3751

(X_U1.OV_OFF)    1.0000               (X_U1.U5_CLK)    0.0000

(X_U1.VS_INT)   40.0000               (X_X4.X_1.d1)   40.0000

(X_X4.X_1.d2)   40.0000               (X_X4.X_1.d3)   40.0000

(X_X4.X_1.d5)   40.0000               (X_X4.X_1.ox)    2.4845

(X_U1.INP_INT)   39.9600              (X_U1.IQ_HIGH)    1.0000

(X_U1.ISCP_HI)    0.0000              (X_U1.U4_IT_I) 86.04E-12

(X_U1.U4_VSNS)    0.0000              (X_X4.X_1.d5a)   40.0000

(X_X4.X_1.ox1)   10.2760              (X_X4.X_1.ox2)   19.4220

(X_U1.BST_GOOD)    0.0000             (X_U1.POWER_ON)    0.0000

(X_U1.U1_EN_ON)    0.0000             (X_U1.U1_OV_ON)    0.0000

(X_U1.U1_VS_ON)    1.0000             (X_U1.U2_CP_EN)    1.0000

(X_U1.U2_CP_ON)    0.0000             (X_U1.U3_PD_EN)    1.0000

(X_U1.U3_PU_EN)    0.0000             (X_U1.U3_SRC_I)     .3751

(X_U1.U5_RESET)    0.0000             (X_U1.U1_INP_ON)    1.0000

(X_U1.U1_N00485)    1.1800            (X_U1.U1_N00544)     .0600

(X_U1.U1_N00770)    1.1800            (X_U1.U1_N00794)     .8800

(X_U1.U1_N01130)    2.0000            (X_U1.U1_N01154)     .4000

(X_U1.U1_N01388)    1.1800            (X_U1.U1_N01412)     .0600

(X_U1.U1_N02314)    3.4000            (X_U1.U1_N02338)     .1000

(X_U1.U2_CHARGE)    1.0000            (X_U1.U2_CP_OFF)    1.0000

(X_U1.U2_N00964)   13.2000            (X_U1.U2_N01094)    1.0000

(X_U1.U2_N01224)    0.0000            (X_U1.U2_N03573)    7.5000

(X_U1.U2_N03597)    1.5000            (X_U1.U2_N03701)    0.0000

(X_U1.U4_N04519)   40.0000            (X_U1.U4_N05098)     .0100

(X_U1.U4_N05171)    1.1900            (X_U1.U4_VSNS_I)    0.0000

(X_U1.U5_N03905)    1.2000            (X_U1.U5_N04002)    1.0000

(X_U1.U5_N04165)    0.0000            (X_U1.U5_N04169)    1.1000

(X_U1.U5_N07522)    0.0000            (X_U1.U5_N07542)   31.2000

(X_U1.U5_N14774)    0.0000            (X_U1.U5_N14987)    0.0000

(X_U1.U5_N15363)    0.0000            (X_U1.U5_N15859)    0.0000

(X_U1.U6_N04895)   39.9710            (X_U1.X_U1_U1.1)    0.0000

(X_U1.X_U1_U2.1)    1.0000            (X_U1.X_U1_U3.1)    1.0000

(X_U1.X_U1_U4.1)    0.0000            (X_U1.X_U1_U5.1)    1.0000

(X_U1.X_U2_U1.1)    0.0000            (X_U1.X_U2_U6.1)    0.0000

(X_U1.X_U4_U1.1)    0.0000            (X_U1.X_U5_U1.1)    0.0000

(X_X4.X_1.edep1)   32.3510            (X_X4.X_1.edep2)    1.6926

(X_X4.X_1.edep3)   17.9280            (X_U1.CS_MINUS_I)   40.0000

(X_U1.INP_ON_DLY)    1.0000           (X_U1.MASTER_RST)    0.0000

(X_U1.U5_FET_OFF)    0.0000           (X_U1.U5_TMR_INT) 2.800E-09

(X_U1.EN_UVLO_INT)    1.0221          (X_U1.U4_IWRN_INT) 1.960E-06

(X_U1.U5_V_TMR_OC)    0.0000          (X_U1.X_U5_U5.MY5)    1.0000

(X_U1.X_U5_U5.Qbr)    1.0000          (X_U1.X_U5_U5.Qqq) 997.0E-06

(X_U1.X_U5_U6.MY5)    1.0000          (X_U1.X_U5_U6.Qbr)    1.0000

(X_U1.X_U5_U6.Qqq) 997.0E-06          (X_U1.U1_EN_ON_DLY)-2.936E-30

(X_U1.U1_N16610933)    1.0000         (X_U1.U1_N16610939)    1.0000

(X_U1.U1_N16611907)-2.677E-30         (X_U1.U1_VS_ON_DLY)    1.0000

(X_U1.U2_DISCHARGE)    0.0000         (X_U1.U2_VBST_DIFF)    -.3816

(X_U1.U3_N16178140)   15.3750         (X_U1.U3_N16612294)    1.0000

(X_U1.U4_N16178192)    5.0000         (X_U1.U4_N16182769)   40.0000

(X_U1.U4_N16184516) 1.960E-06         (X_U1.U5_LATCH_SET)    0.0000

(X_U1.U5_N16610209)    0.0000         (X_U1.U5_N16611762)    1.0000

(X_U1.U5_N16612251)    1.0000         (X_U1.U5_V_TMR_FLT)    0.0000

(X_U1.U5_V_TMR_LOW)    1.0000         (X_U1.U6_ISCP_HI_I)    0.0000

(X_U1.U6_N16619676)   39.9710         (X_U1.X_U1_U1.INM1)     .1579

(X_U1.X_U1_U1.INP1)    0.0000         (X_U1.X_U1_U1.INP2)    0.0000

(X_U1.X_U1_U2.INM1)     .1579         (X_U1.X_U1_U2.INP1)    0.0000

(X_U1.X_U1_U2.INP2)     .8800         (X_U1.X_U1_U3.INM1) -37.9600

(X_U1.X_U1_U3.INP1)    0.0000         (X_U1.X_U1_U3.INP2)     .4000

(X_U1.X_U1_U4.INM1)     .8049         (X_U1.X_U1_U4.INP1)    0.0000

(X_U1.X_U1_U4.INP2)    0.0000         (X_U1.X_U1_U5.INM1) -36.6000

(X_U1.X_U1_U5.INP1)    0.0000         (X_U1.X_U1_U5.INP2)     .1000

(X_U1.X_U2_U1.INM1)   13.5820         (X_U1.X_U2_U1.INP1)    0.0000

(X_U1.X_U2_U1.INP2)    0.0000         (X_U1.X_U2_U4.YINT)    0.0000

(X_U1.X_U2_U6.INM1)    7.8816         (X_U1.X_U2_U6.INP1)    0.0000

(X_U1.X_U2_U6.INP2)    0.0000         (X_U1.X_U2_U7.YINT)    1.0000

(X_U1.X_U2_U8.YINT)    1.0000         (X_U1.X_U2_U9.YINT)    1.0000

(X_U1.X_U3_U2.YINT)    1.0000         (X_U1.X_U3_U5.YINT)    0.0000

(X_U1.X_U4_U1.INM1)    1.1900         (X_U1.X_U4_U1.INP1)    0.0000

(X_U1.X_U4_U1.INP2)    0.0000         (X_U1.X_U5_U1.INM1)    1.2000

(X_U1.X_U5_U1.INP1)    0.0000         (X_U1.X_U5_U1.INP2)    0.0000

(X_U1.X_U5_U5.Qint) 997.0E-06         (X_U1.X_U5_U6.Qint) 997.0E-06

(X_U1.X_U5_U7.YINT)    1.0000         (X_U1.X_U6_U1.Yint)    0.0000

(X_U1.U5_TCB_LR_TOC)    1.0000        (X_U1.X_U1_U10.YINT)    0.0000

(X_U1.X_U1_U11.YINT)    0.0000        (X_U1.X_U1_U8.YINT1)    1.0000

(X_U1.X_U1_U8.YINT2)    1.0000        (X_U1.X_U1_U8.YINT3)    1.0000

(X_U1.X_U5_U5.MYVSS)    0.0000        (X_U1.X_U5_U5.Qqqd1)    0.0000

(X_U1.X_U5_U6.MYVSS)    0.0000        (X_U1.X_U5_U6.Qqqd1)    0.0000

(X_U1.X_U6_U7.YINT1)    0.0000        (X_U1.X_U6_U7.YINT2)    0.0000

(X_U1.X_U6_U7.YINT3)    0.0000        (X_U1.U5_FLT_I_B_LOW)    1.0000

(X_U1.X_U3_U730.YINT)    1.0000       (X_U1.X_U5_U609.Yint)    0.0000

(X_U1.X_U5_U720.Yint)    0.0000       (X_U1.X_U5_U721.inp1)    0.0000

(X_U1.X_U5_U721.yin1)    0.0000       (X_U1.X_U5_U721.yin2)    0.0000

(X_U1.X_U5_U721.yin3)    0.0000       (X_U1.X_U5_U721.yin4)    0.0000

(X_U1.X_U5_U722.YINT)    0.0000       (X_U1.X_U5_U723.YINT)    0.0000

(X_U1.X_U5_U725.YINT)    0.0000       (X_U1.X_U5_U727.YINT)    1.0000

(X_U1.X_U5_U728.YINT)    1.0000       (X_U1.X_U5_U730.YINT)    0.0000

(X_U1.X_U5_U731.YINT)    0.0000       (X_U1.U5_FLT_I_B_HIGH)    0.0000

(X_U1.X_U1_U726.YINT1)    0.0000      (X_U1.X_U1_U726.YINT2)    0.0000

(X_U1.X_U1_U726.YINT3)    1.0000      (X_U1.X_U1_U727.YINT1)    1.0000

(X_U1.X_U1_U727.YINT2)    1.0000      (X_U1.X_U1_U727.YINT3)    1.0000

(X_U1.X_U5_U5.X3.YINT)    0.0000      (X_U1.X_U5_U6.X3.YINT)    0.0000

(X_U1.X_U5_U726.YINT1)    1.0000      (X_U1.X_U5_U726.YINT2)    1.0000

(X_U1.X_U5_U726.YINT3)    0.0000      (X_U1.X_U5_U729.YINT1)    0.0000

(X_U1.X_U5_U729.YINT2)    0.0000      (X_U1.X_U5_U729.YINT3)    1.0000

(X_U1.U5_TMR_DISCHARGE)    1.0000     (X_U1.U5_AUTO_RETRY_SET)    0.0000

(X_U1.U4_VS_MINUS_CS_PLUS) 8.604E-09 (X_U1.U4_VS_MINUS_CS_PLUS_I) 8.604E-09

These voltages failed to converge:

    V(EN_UVLO)                =     1.436V \     1.022V
    V(OV)                     =   796.08mV \   375.14mV
    V(TMR)                    =     12.77V \    2.800nV
    V(N005180)                =         0V \    4.281uV
    V(VOUT)                   =     10.52V \   375.07mV
    V(N08556)                 =   806.77mV \   374.81mV
    V(N085881)                =   806.77mV \   374.81mV
    V(X_X4.g1)                =   806.77mV \   374.81mV
    V(X_X4.g)                 =   806.77mV \   374.81mV
    V(X_X4.s1)                =     10.52V \   375.07mV
    V(X_X4.s)                 =     10.52V \   375.07mV
    V(X_U1.EN_UVLO_INT)       =     1.436V \     1.022V
    V(X_U1.OV_INT)            =   796.08mV \   375.14mV
    V(X_U1.U2_VBST_DIFF)      =    -10.53V \ -381.63mV
    V(X_U1.U3_N16178140)      =     25.52V \     15.38V
    V(X_U1.U3_SRC_I)          =     10.52V \   375.07mV
    V(X_U1.U5_TMR_INT)        =     12.77V \    2.800nV
    V(X_X4.X_1.ox)            =     2.917V \     2.485V
    V(X_X4.X_1.ox1)           =     10.70V \     10.28V
    V(X_X4.X_1.ox2)           =     19.81V \     19.42V
    V(X_X4.X_1.edep1)         =     37.85V \     32.35V
    V(X_X4.sp)                =     10.52V \   375.07mV
    V(X_X4.X_1.edep2)         =     11.84V \     1.693V
    V(X_X4.X_1.edep3)         =     26.60V \     17.93V
    V(X_X4.X_1.s)             =     10.52V \   375.07mV
    V(X_U1.X_U2_U6.INM1)      =     18.03V \     7.882V
    V(X_U1.X_U2_U1.INM1)      =     23.73V \     13.58V
    V(X_U1.X_U1_U2.INM1)      = -256.18mV \   157.90mV
    V(X_U1.X_U1_U4.INM1)      =   383.92mV \   804.87mV
    V(X_U1.X_U1_U1.INM1)      = -256.18mV \   157.90mV
    V(X_U1.X_U5_U1.INM1)      =    -11.57V \     1.200V
    V(X_U1.X_U5_U6.Qint)      =    2.000fV \    0.997mV
    V(X_U1.X_U5_U6.Qqq)       =    2.000fV \    0.997mV
    V(X_U1.X_U5_U5.Qint)      =    2.000fV \    0.997mV
    V(X_U1.X_U5_U5.Qqq)       =    2.000fV \    0.997mV

These supply currents failed to converge:

    I(X_U1.E_E2)              =   -67.24pA \   -80.01pA
    I(X_U1.E_U3_E3)           =   -24.73pA \   -15.00pA
    I(X_X4.X_1.E_Eds1)        =         0A \   -16.43pA
    I(X_X4.X_1.E_Eds3)        =         0A \   -7.441pA
    I(X_X4.L_g)               = -106.86nA \   -1.732pA
    I(X_X4.L_s)               =   -11.27nA \ -158.57nA
    I(X_X4.L_d)               =   117.96nA \   158.55nA
    I(V_VbATT)                =   -94.63uA \   -95.10uA
    I(V_V2)                   =   918.33pA \    2.212nA
    I(X_U1.V_U3_V1)           =   -24.73pA \   -15.00pA
    I(X_X4.X_1.V_sm)          =   -7.276pA \         0A
    I(X_X4.X_1.V_sense)       =   117.95nA \   158.54nA
    I(X_X4.X_1.V_sense2)      =    46.02pA \    56.16pA

These devices failed to converge:
    X_X4.X_1.E_Eds1 X_X4.X_1.E_Eds3 X_U1.X_U1_U1.EOUT X_U1.X_U5_U1.EOUT
    X_U1.X_U5_U720.E_ABM X_X4.X_1.G_th

**** Interrupt ****

0 mohamed ElHammady 1 month ago in reply to mohamed ElHammady

Prodigy 80 points

Output file
** Creating circuit file "Test.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS

*Libraries:
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of C:\Users\mohamed.elhammady\cdssetup\OrCAD_PSpice\17.2.0\PSpice.ini file:
.lib "C:\Users\mohamed.elhammady\Desktop\High side driver\TPS48110-Q_unencrypted\TPS48110-Q1_PSPICE_TRANS\TPS48110-Q1_TRANS.lib"
.lib "C:\Users\mohamed.elhammady\Desktop\High side driver\Infineon-Automotive_OptiMOS_5_80V-SimulationModels-v04_00-EN\OptiMOS_5_80"
+ "V\OptiMOS_5_80V_PSpice.lib"
.lib "nom.lib"

*Analysis directives:
.TRAN 0 800ms 0
.OPTIONS ADVCONV
.PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"

**** INCLUDING SCHEMATIC1.net ****
* source HIGH_SIDE_DRIVER
X_X4         VS N08556 VOUT N07288 N03264 IAUA250N08S5N018 PARAMS: Ld=0.7n
+ Lg=0.1n Ls=0.05n dC=0 dRdson=0 dVbr=0 dVth=0 dZth=0 dgfs=0
X_Q1         DIODE DIODE 0 awbmmbt3904 PARAMS:
+
R_R1         EN_UVLO VS 976k TC=0,0
R_R2         OV EN_UVLO 16.2k TC=0,0
R_R3         0 OV 20.5k TC=0,0
R_RIWRN         IWRN 0 49k TC=0,0
R_RSNS         CS_MINUS VS 0.1m TC=0,0
R_RSET         CS_PLUS VS 100 TC=0,0
R_R7         FLT_I_B VS 10k TC=0,0
R_R8         FLT_T_B VS 10k TC=0,0
R_RIMON         IMON 0 15k TC=0,0
R_RISCP         VS ISCP 1.33k TC=0,0
C_CTMR         0 TMR 33n TC=0,0
C_CLOAD         N005180 VOUT 1m TC=0,0
C_CBST         BST VOUT 680n TC=0,0
V_VbATT         VS 0
+PULSE 40 40 1m 1m 1m 400m 450m
R_RINP         INP VS 1k TC=0,0
R_RESR         N005180 0 0.2 TC=0,0
V_V2         N03264 0 23
X_U1         BST CS_MINUS CS_PLUS DIODE EN_UVLO FLT_I_B FLT_T_B 0 IMON INP ISCP
+ IWRN VOUT OV OV OV VOUT TMR VS TPS48110-Q1_TRANS
C_CFLT_T         0 FLT_T_B 1p TC=0,0
C_CTJ         0 N07288 1p TC=0,0
R_RINRUSH         OV N08556 100k TC=0,0
R_Rinruhs2         N085881 N08556 10 TC=0,0
C_CINRUSH         0 N085881 150n TC=0,0

**** RESUMING Test.cir ****
.END

**** 02/13/25 08:16:00 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********

** Profile: "SCHEMATIC1-Test" [ c:\users\mohamed.elhammady\desktop\high side driver\workfolder\high_side_driver-pspicefiles\schemat

****     Diode MODEL PARAMETERS

******************************************************************************

               d_d1            X_U1.X_U5_U6.D_D1
          IS    1.000000E-15    1.000000E-15
           N     .01             .01
          RS     .05             .05
          TT   10.000000E-12   10.000000E-12

               X_U1.X_U5_U5.D_D1
          IS    1.000000E-15
           N     .01
          RS     .05
          TT   10.000000E-12

               X_U1.X_U5_U721.d_d1
          IS    1.000000E-15
           N     .1
          RS    5.000000E-03
          TT   10.000000E-12

**** 02/13/25 08:16:00 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********

** Profile: "SCHEMATIC1-Test" [ c:\users\mohamed.elhammady\desktop\high side driver\workfolder\high_side_driver-pspicefiles\schemat

****     BJT MODEL PARAMETERS

******************************************************************************

               X_Q1.model4
               NPN
       LEVEL    1
          IS   10.000000E-15
          EG    1.11
          BF 360
          NF    1
         VAF   62.5
         IKF     .05
         ISE 250.000000E-15
          NE    1.55
          BR     .4842
          NR     .9657
         VAR   28.3
         IKR     .08
         ISS    0
          RB    1.14
         RBM    1.14
          RE     .745
          RC    1.2
         CJE    4.541300E-12
         VJE     .1037
         MJE     .1514
         CJC    3.664800E-12
         VJC     .4339
         MJC     .2218
        XCJC    1
         CJS    0
         VJS     .7
         MJS     .5
          TF 392.100000E-12
         XTF    1
         VTF 500
         ITF     .2
          TR 670.000000E-09
         XTB    1.5815
          KF    0
          AF    1
          CN    2.42
           D     .87

**** 02/13/25 08:16:00 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********

** Profile: "SCHEMATIC1-Test" [ c:\users\mohamed.elhammady\desktop\high side driver\workfolder\high_side_driver-pspicefiles\schemat

****     Voltage Controlled Switch MODEL PARAMETERS

******************************************************************************

               X_U1.X_U3_S1._U3_S1
         RON    3
        ROFF    1.000000E+09
         VON     .6
        VOFF     .4

               X_U1.X_U3_S2._U3_S2
         RON    3
        ROFF    1.000000E+09
         VON     .6
        VOFF     .4

               X_U1.X_U5_S1._U5_S1
         RON   70
        ROFF    1.000000E+12
         VON     .6
        VOFF     .4

               X_U1.X_U5_S2._U5_S2
         RON    1.000000E-03
        ROFF    1.000000E+12
         VON     .6
        VOFF     .4

               X_U1.X_U5_S3._U5_S3
         RON    1.000000E-03
        ROFF    1.000000E+09
         VON     .6
        VOFF     .4

Starting pseudo-transient algorithm.

ERROR(ORPSIM-16550): Floating point computation failed during matrix solution. Possible solutions: 1)Ensure that all device parameters are in valid range. 2)Try using .options LIMIT

INTERNAL ERROR -- Divide by Zero, Divide

ABORTING SIMULATION
**** 02/13/25 08:16:00 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ********

** Profile: "SCHEMATIC1-Test" [ c:\users\mohamed.elhammady\desktop\high side driver\workfolder\high_side_driver-pspicefiles\schemat

****     JOB STATISTICS SUMMARY

******************************************************************************

Node counts:
Top level (NUNODS)                =          20
External (NCNODS)                 =         231
Total (NUMNOD)                    =         247

Total device count (NUMEL)          =         363
Capacitors (C)                    =          85
Diodes (D)                        =          13
VCVS (E)                          =          87
VCCS (G)                          =          16
CCVS (H)                          =           1
Current Sources (I)               =           1
Inductors (L)                     =           3
BJTs (Q)                          =           1
Resistors (R)                     =         116
VSwitches (S)                     =           5
Voltage Sources (V)               =          32

Number of subcircuits (X)           =          50

Matrix statistics:
Matrix size (NSTOP)               =         370
Initial no. elements (NTTAR)      =         977
No. elements w/ fillin (NTTBR)    =        1226
No. fillins (IFILL)               =         249
No. overflows (NTTOV)             =         302
No. LU operations (IOPS)          =        5978
Percent sparsity (PERSPA)         =      99.104

Analysis statistics:
No. total time points (NUMTTP)    =      315698
No. rejected time points (NUMRTP) =       57669
No. iterations (NUMNIT)           =     1549661

Load Threads                        =          32

Runtime statistics:                       Seconds      Iterations   Stopped At
Matrix load                       =       78.76
Matrix solution                   =        7.94               6
Readin                            =         .02
General setup                     =        0.00
CMI setup                     =        0.00
Setup                             =        0.00
DC sweep                          =        0.00               0
Bias point                        =        0.00               0
Default algorithm                 =        -.06           -1050
GMIN stepping                     =         .05            1050     100.00m
Supply stepping                   =         .02               0       24.87%
AC and noise                      =        0.00               0
Total transient analysis          =        0.00
Output                            =        0.00
Overhead                          =         .08
License check-out time            =      316.05
Total job time (using Solver 1)   =       95.64

0 Sarah Raines 1 month ago in reply to mohamed ElHammady

TI__Expert 5440 points

Hi Mohamed,

I cannot tell from this what the issue may be. From my side, the "out of box" works just fine and it looks to me that you are using the full version of PSPICE so I don't see any issue with the setup we provide.

Thank you,

Sarah

Power management

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TPS48110Q1EVM: TPS48110-Q1_PSPICE_TRANS not working