Other Parts Discussed in Thread: TPS389006
Tool/software:
The chip communicates with the CPU through the IIC bus, and the bus transmission rate is 100Kbit/s. According to the requirements of the CPU data sheet, the maximum data output delay time(tI2OVKL) during write operations is 0.9us. However, based on our actual testing results, this time reaches 1.8us. Will this cause the CPU to fail to write to the chip?
