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TPS25981: Queries on Ground Splitting, UVLO - OVLO Resistor Divider Configurations and Layout Guidelines || TPS259814A

Shashank K S
Prodigy 115 points
Part Number: TPS25981

Tool/software:

Dear Team,

I have the following queries regarding the TPS259814A IC:

(1) Ground Splitting:

As per the EVM, the ground is split into power ground and IC ground and connected together through 0 Ohm 0603 Resistor. However the datasheet doesn't not highlight this information. Is ground splitting really necessary?

(2) Layer Stackup Requirements and Layout Guidelines:

The layout images mentioned in the EVM seems to be incomplete with only 2 layers (top and bottom) shown. However, the datasheet recommends a min. 4 Layer stackup with the ground planes routed internally.

It would be helpful if design files of the TPS25981EVM could be provided for analysis and understanding of the layout requirements for this IC.

(3) UVLO & OVLO Resistor Settings:

There are two configurations mentioned in the datasheet and EVM,

Config (a): using individual resistor divider networks on each UVLO and OVLO pins from the IC (from EVM)

Config (b): Using a stacked Resistor divider connecting both UVLO and OVLO Pins. (from Datasheet)

Kindly provide clarity on which out of these has merit over the other.

Regards,

Shashank K S

Electronics Engineer

  • +1
    TI__Mastermind 39045 points

    Hi Shashank,

    Shashank K S said:
    However the datasheet doesn't not highlight this information. Is ground splitting really necessary?

    It is part of best practice. This prevents any possibility of ground bouncing. During normal application conditions, you should not expect ground bouncing to happen. These are the guidelines/recommendations. It is up to end user to design accordingly. Many customers don't follow this and connect everything together with Ground layer. 

    Shashank K S said:
    It would be helpful if design files of the TPS25981EVM could be provided for analysis and understanding of the layout requirements for this IC.

    TPS25981EVM_withoutTILogo.zip

    These are altium files.

    Shashank K S said:
    Kindly provide clarity on which out of these has merit over the other.

    stacked arrangement means total 3 resistors. Individual resistive divider means total 4 resistors. So size, cost are obvious factors. In most cases you can set your desired threshold in both cases.

    Best Regards,
    Arush

  • 0 in reply to Arush Gupta
    Prodigy 115 points

    Thank you for the information. The calculator provided on the website supports only for TP259814A/L, the same calculations should be applicable for TP259813A/L right?

  • +1 in reply to Shashank K S
    TI__Mastermind 39045 points

    Hi Shashank,

    Yes, calculations won't change based on variants.

    Best Regards,
    Arush