This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LM73100EVM: Startup failure

Part Number: LM73100EVM

Tool/software:

Dear Team,

My customer is evaluating the LM73100EVM.
When they evaluated the LM73100EVM under the following conditions, the LM73100 did latch-off.
<Conditions>
 - Vin: 20V (from ~6V)
 - Iout: 10Ω dummy load for 2A at Vout=20V
 - UVLO setting: 10V
 - OVP setting: 23V
 - dVdt capacitor: 3300pF

Measurement waveformes is as below,

CH1:Vout、CH2:Vin、CH3:Iout

Do you understand what cuases this startup failure?
Which setting should they change?

Best Regards,

Koshi Ninomiya

  • Hi Ninomiya-san,

    Can you share the Cout value. I am suspecting that due to high resistive and capacitive load, the startup failed. If they just remove the electrolytic cap from EVM, then the startup should happen with 3.3nF or OPEN setting for DvDt pin.

    Please let me know if this works.

    Best Regards,
    Arush

  • Hi Arush-san,

    According to the customer, they use a DC electronic load, DL300L frin NF Corporation.
    https://www.nfcorp.co.jp/pro/ps/el/dl3000/#3

    They connect the DC electronic load directly to the LM73100EVM.
    Is it possible to start up with the connection of the DC electronic load?

    Best Regards,

    Koshi Ninomiya

  • Hi Ninomiya-san,

    They should use the e-load in CR mode. We do not recommend use of CC mode. Yes, device will support startup with the load. 

    Most likely issue here is, due to high capacitive and resistive load, the device is going into thermal shutdown during startup. So I suspect that faster startup will help prevent TSD. 

     Can they try startup with dvdt pin jumper to OPEN (without very high output cap)

    Best Regards,
    Arush