LM3409: Peak Current Controll Circuit derivation and working.

Hi Abishek,

I see you posted multiple questions about the peak current control for LM3409. I have closed the thread you posted on the amplifiers forum and I will continue to support all of your LM3409 questions here on the power management forum. https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1475648/amplifiers-forum 

On the other thread you posted figure 20 from the datasheet and asked the following question:

I am having doubt on peak current control circuit (Rsns) section. Since op-Amp can ref voltage with ground. In that case voltage at non-inverting terminal should be 1.24v. How it is 1.24? In what basic principle is used in that circuit analysis?

The op-amp at the bottom of figure 20 is configured as a constant current source with the internal MOSFET and resistor labelled "5R". The voltage at the IADJ pin can be set externally or set internally by leaving the pin open. When the pin is open, the voltage is set to ~1.24V by the internal zener diode and 5µA current source.

This constant current source creates a constant voltage drop "Vcst" across the resistor labelled "R" in series with the CSP pin. As the current flowing through 5R is equal to the current flowing through R and these two resistors are proportional to each other by a factor of 5, the Vcst voltage is simply VADJ / 5 or ~248mV when the IADJ pin is left open (VADJ = 1.24V).

The peak-current-control comparator is triggered when the voltage drop across the sense resistor exceeds the voltage drop Vcst. Therefore, ILmax * Rsns = Vcst

Regards,

Zach

Hi Abishek,

The comparator does not "see" Vadj voltage as there is a Vds voltage drop across the mosfet. Instead, the comparator pins are monitoring Vin - Vcst (+ pin) and Vin - Vsns (- pin).

Regards,

Zach