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LMG2100R044: Application Inquiry

Renan Santos Adriano
Mastermind 22220 points
Part Number: LMG2100R044

Tool/software:

Hello Team,

I'm starting a design with the LMG2100R044, using the half-bridge power stage to control another device.
I have two questions regarding the device: 

1) Is there a start-up phase where the output is not defined of the device or it is fully functional as far as I provide Hi and LI signals?

2) Is there a maximum rating for the additional Cbootstrap capacitor? Any documentation you can share?

Regards,

Renan

  • 0
    TI__Expert 4510 points

    Hello Renan,

    Some answers for you:

    1. From a high-level perspective, the GaN FETs are enhancement mode devices, meaning they will not conduct unless a positive voltage is applied to the gate. During start-up, the LMG2100 device must monitor the VCC voltage for low-side FET and HB/HS voltage for high-side FET, each of which have under voltage lockout.
    Depending on the voltage off VCC/HB, and the input logic states HI/LI, the "output" switch node (SW) will be either shorted to PGND, or high impedance like an open circuit.

    Section 7.3.2 Start-up and UVLO of the LMG2100R044 datasheet describes the start-up considerations and logic table, please reference this for a detailed description.

    2. The bootstrap capacitor must be large enough to hold the necessary charge for high-side GaN FET switching, but not too large that the charge-up time interferes with switching period.
    From our testing, a 0.1uF ceramic capacitor is the best to use for most all situations, and I recommend that for you. If you would like to share your specific switching conditions, we can look to see if there is any outstanding condition which would make this recommendation invalid. From my experience, the most common issue with bootstrap power supply happens when the desired duty cycle is very extreme. In this case, the low-side device is not ON for long enough to charge the bootstrap capacitor, which would likely require the use of a dedicated high-side supply. 

    Thanks,
    Zach S 

  • 0 in reply to Zachary Soviero
    TI__Mastermind 22220 points

    Hello Zach,

    thanks, the clarifications.

     The idea is to use the device for driving an Inverter through a vector clamping modulation.

     Indeed, the pulse width that we need to achieve in certain condition might reach a maximum of 10ms (worst case). This would imply to add more bootstrap capacitance, more than the suggested 0.1uF. There could be problems in this condition? The internal bootstrap diode would be able to achieve this condition?

    Regards,

    Renan

  • 0 in reply to Renan Santos Adriano
    TI__Expert 4510 points

    Hello Renan,

    Thank you for adding more clarification, I understand why you have these concerns now.
    Is this a cyclo or matrix converter application? We see these as new and emerging topologies in the inverter space and have team members working with them.

    I need to reach out to one of our teams about the space vector modulation and see how this affects the bootstrap implementation. I will get back to you early next week.
    In the meantime, please share more details about the converter if you can.

    Thanks,
    Zach S

  • 0 in reply to Zachary Soviero
    TI__Mastermind 22220 points

    Hello Zach,

    Good day.

    Please see the response from the customer below:

    We are working on a standard 2-level inverter with clamping modulation, I can not share any other information about it.

    Regards,

    Renan

  • 0 in reply to Renan Santos Adriano
    TI__Expert 4510 points

    Hi Renan,

    No worries there, thanks for the feedback. I have reached out to our SEM team who has experience working with SVM and will respond here tomorrow.

    Thanks,
    Zach S