TPSM82902: TPSM82902 : Rise time and Output Power Ramp Query

Hi Sir,

These pictures are very vague. Could you share more clear?

Thanks,

Colin

Hi Colin,

I have attached PDF of both schematics and output power ramp.

/cfs-file/__key/communityserver-discussions-components-files/196/3187.TPSM82902SISR.pdf

/cfs-file/__key/communityserver-discussions-components-files/196/TPSM82902SISR_2D00_Output-Power-Ramp.pdf

Thanks

Hi Sir,

The schematic looks good to me.

What is load for this?   Is this picture captured with load? Could you shows the SW and V_Css to me?

Thanks,

Colin

Hi Colin,

1. Load includes Level Translator, NOR Flash and Temperature sensor ICs.

2. Yes the output ramp is captured with load. 

3. I did not understand SW and V_Css, could you please explain clearly?

Thanks

SW means switching node waveforms V_css means soft start cap voltage.

I need these two waveforms to better know the behavior of soft start process.

Then i can help you to debug this abnormal Vout.

Thanks,

Colin 

Hi Colin,

I have attached the switching and V_CSS waveforms below.

/cfs-file/__key/communityserver-discussions-components-files/196/SW-and-V_5F00_CSS-waveforms.pdf

Thanks

The V_css looks right which mean soft start reference has no problem.

I think such step in Vout is caused by load step.

Could you start with no load behind?

Colin

Hi Colin,

1. It would be difficult to test without load in my current setup. Please provide any alternate method for that.

2. I noticed that the switching frequency measured is at 2MHz when the selected frequency is 1MHz. Is that proper?

Thanks