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BQ25792: Noise issue in PFM mode

Part Number: BQ25792

Tool/software:

Hi Team,

We met the noise issue operating in PFM mode.

And we tried to use the bit to let BQ part operate in FPWM mode. (PFM_FWD_DIS) And it could work. But when we do the VAC1/2 switch over, the bit may be reset to enable PFM. Does it make sense to you?

In addition, I found below content in datasheet. Do we need to set both of DIS_FWD_OOA and PFM_FWD_DIS to reduce the PFM noise?

Regards,

Roy

  • Hi Roy,

    When PFM is enabled, OutOfAudio bit prevents PFM pulses in the audio range when there is very light load (<<100mA) on SYS/BAT.  If the host disables OOA, there could be audible noise in that range.  I am not aware of switch over on VACx causing a reset but I will go check shortly.  The only recently found conditions to cause audible ringing are:

    1. ISYS/ICHG~=200mA-300mA with PFM on and OOA on.  If the host disables OOA or load increases/decreases, this does not occur.  Still investigating root cause.  

    2. fsw=1.5Mhz and VBUS~=VBAT just before entering/exiting buck-boost mode.  The converter min controllable pulse width is less than the min duty cycle so the converter starts skipping pulses for a brief period.  The frequency of this pulses can be in the audible range.  Changing to fsw=750kHz prevents this.

    Disabling PFM prevents this noise but increase operating Iq which is noticeable at light load.

    Regards,

    Jeff

  • Hi Jeff,

    If we want to reduce the noise in PFM mode, should be enable the bit or disable the bit? (0 or 1?)

    Please help check it. Thank you.

    I am not aware of switch over on VACx causing a reset but I will go check shortly. 

    Regards,
    Roy

  • HI Roy,

    Disabling PFM (and OOA which is only valid if PFM is enabled) prevents switching in the audible range but increase Iq.

    If the SYS load is between 200-300mA and PFM and OOA are enabled, disabling OOA prevents an oscillation that can be in the audible range in that load range.  But, the charger could see pulses in the audible range if the load current drops <<100mA. 

    VACx switch over does not change PFM or OOA bits.

    Regards,

    Jeff

  • Hi Jeff,

    I see below content in datasheet. Does it mean that the PFM_FWD_DIS bit may reset when we switch the voltage from low to high?

    For example, VAC1 = 12V, VAC2 = 5V. Now we used the VAC2 and then switch to VAC1. It will trigger the POR?


    Regards,
    Roy

  • Hi Roy,

    On my EVM board, the PFM_FWD_DIS did not change when I switched from VAC1 to VAC2 or vice versa.

    Regards,

    Jeff

  • Hi Jeff,

    Even from low voltage VAC to high voltage VAC? My customer reported that the PFM_FWD_DIS did not change every time. May you help test more times? like 20times?

    Regards,

    Roy

  • Hi Roy, we will get back to you on this next week.

  • Hi Roy,

    Is a battery present when the switchover occurs?  If not, does VBUS drop < VBUS_UVLO during the switchover?  If so, then all the registers return to default values.

    Regards,

    Jeff

  • Hi Jeff,

    Yes, I suspect that there is VBUS drop when doing switch over. I've let customer monitor the VBUS when doing the VAC switch over. And dump the all reg. I believe all of register back to POR value.

    And I would like to check the correct action for VAC switch over. 

    For example, if BQ uses VAC2 and VAC1 is also presented. If we would like to switch to use VAC1. Just set 0x13h[7:6] from 01b to 10b. correct?

    Regards,

    Roy

  • Hi,

    The host must first write EN_ACDRV2 = 0 then write EN_ACDRV1=1.

    Regards,

    Jeff

  • Hi Jeff,

    We found that the VBUS voltage would down to 2.5V when we did the VAC switchover. (From VAC2(5V) to VAC1(12V)) Is it normal? It looks like that it needs around 5ms to do switch over and the Vbus cap can't regulate the VBUS voltage. 

    Does it mean that the VBUS cap is insufficient at this moment? Do you have any workaround?


    Regards,
    Roy

  • Hi Roy,

    VBUS=2.5V is below VBUS_UVLO.  I don't understand what you mean by "Vbus cap can't regulate the VBUS voltage".  There must be a delay on switchover in order to prevent connecting VAC1 source to VAC2 source.

    Regards,

    Jeff

  • Hi Jeff,

    I mean if customer did the VAC switchover, the phenomenon(VBUS drop) is expected? 

    I mean for VBUS drop, should we add more cap on VBUS to regulate the voltage when doing the switchover?

    I don't understand what you mean by "Vbus cap can't regulate the VBUS voltage"

    I do believe this is not a normal phenomenon, otherwise we would recommend customer place enough cap on VBUS to prevent VBUS drop doing switchover.

    May you help use EVM board and measure the VBUS node when doing switchover? (5V-VAC2 to 12V-VAC1) We tried to add more cap on VBUS and it looks like that the switchover time wasn't fixed and VBUS would down to VBUS_UVLO and then switch the VAC.

    Regards,

    Roy

  • Hi Roy,

    VBUS drooping is not unexpected because the converter is still running when EN_ACDRx is set to 0 and before EN_ACDRy is set to 1.  If you don't want VBUS to collapse to UVLO, you can first set EN_HIZ=1 then EN_ACDRx=1 then EN_ACDRy=1 and then EN_HIZ=0.  That would prevent the converter from drawing current from the VBUS capacitors during the switchover.  So, in theory, with a big enough capacitance on VBUS, VBUS voltage would not drop below VBUS_UVLO.

    I do not understand what the concern is here.  No other customer has asked about this.  What is the issue with VBUS dropping below VBUS_UVLO?  If a battery with voltage > VBAT_UVLO is present, the registers do not reset.

    Regards,

    Jeff

  • Jeff,

    Thanks for support. I will let customer follow the normal way to do VAC switchover. In addition, for the issue, the system isn't under POR to change the bit. The customer has incorrect action to set back the PFM bit.

    Regards,
    Roy