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Original question:

TPS650332-Q1: how to come out Reset mode

TPS650332-Q1: How can the host determine the type of Priority 2 fault from the PMIC

Sandeep Pinninti
Prodigy 190 points
Part Number: TPS650332-Q1

Tool/software:

Hello Team,

About the PMIC P2 failures 

How the Host can know type of failure happen in the PMIC 

If the PMIC enters a "wait for power cycle" state due to a Priority 2 failure, can the host, after resetting power, query the PMIC to determine the specific type of failure that occurred? Does the PMIC store this failure data ??

Same question for RESET mode ??

  • 0
    TI__Mastermind 48731 points

    Hi Sandeep,

      When the reset caused by power cycle of VSYS, all fault flags will be cleared and stored back to default given by datasheet.

      If configured for 'wait for power cycle' and the PMIC enters into this mode, the only way to get the faults is if there was some local I2C controller that could directly query the PMIC.

      If configured for 'reset', the fault flags can be read after the reset, as long as VSYS is not removed.

    Thanks!

    Phil

  • 0
    Prodigy 190 points

    Hello Phil

    Thanks for support,

    If P2 faults are configured to reset automatically, what is their average time to transition from a reset state back to an active state?

    Sandeep P.

  • 0 in reply to Sandeep Pinninti
    TI__Mastermind 48731 points

    Hi Sandeep,

      The total time depends on the device configurations since reset runs the power-down sequence first and then runs power-on sequence.

      I just measured the average time between power down completed and start to power on again which should be independent from configurations; the average time is about 10.5mS as showing by screenshot below:

    Thanks!

    Phil

  • 0 in reply to Phil Yi
    Prodigy 190 points

    Hello Phil,

    Thanks for support 

    Can we consider the average time for all the list of faults in P2 category will have same time 10.5mS ?

    What about when multiple faults are occurred at once (2 or 3 or more) ?

    What will happens if the faults has not cleared even after multiple RESETS by PMIC ?

    Sandeep P 

  • 0 in reply to Sandeep Pinninti
    TI__Mastermind 48731 points

    Hi Sandeep,

       Yes; the 10.5mS is the interval time between reset cycle. When multiple faults are occurred at once; the interval time should be counted from the last one.

       The reset cycles don't stop if the faults has not cleared even after multiple RESETS by PMIC.

    Thanks!

    Phil