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TPS6593-Q1: TPS6593-Q1 : VBACKUP Functionality

Part Number: TPS6593-Q1

Tool/software:

Hi Team,

We want to use the Backup feature for the TPS65931211RWERQ1 IC.

I want to understand during loss of Power Which components of IC will be Active and which all features will be Active.

Also can you let us know what should be the value of the Series Limit Resistor and Super Cap Ratings, along with changes required on the hardware level.

This PMIC IC is interfaced with AM62A74AUMSIAMBRQ1 SOC.

Regards,

Tirthal Patel

  • Good day Tirthal,

    We want to use the Backup feature for the TPS65931211RWERQ1 IC.

    I want to understand during loss of Power Which components of IC will be Active and which all features will be Active.

    VBACKUP IS NOT INTENDED FOR POWER RAIL OUTPUTS, DO NOT LOAD VRTC OR VINT

    The VRTC will be powered off of the VBACKUP in the event the VCCA dips below VCCA_UVLO (~2V7), this powers registers a few registers under that domain such as the Real Time Clock (RTC) and other registers to preserve under errors or low power modes. The primary usage is for the RTC, the RTC is only available when the crystal portion of the IC is populated on the respective pins. This is stated in section 8.4.1.1 Fixed Device Power FSM, see below for that snippet.

    Also can you let us know what should be the value of the Series Limit Resistor and Super Cap Ratings, along with changes required on the hardware level.

    This PMIC IC is interfaced with AM62A74AUMSIAMBRQ1 SOC.

    The figures are in the datasheet, Is there any specification in the datasheet that is confusing?

    BR,

    Nicholas McNamara

  • Hi Nicholas ,

    Can you please Confirm the Below Points : 

    This is the part which we would be using : TPS65931211RWERQ1
    1 Super-cap/Coin cell, Does not require any other Charging IC to charge the Super cap as the charging volage will be provided from within the PMIC.
    2

    When PMIC running on the VBACKUP current consumption is 10uA.(Regulators Disabled, No Supply on the Input of PMIC Pin)

    3 VBACKUP Charging current : 100/500uA.(Super-cap/Coin cell charging Current)
    4 VBACKUP End Of Charging Voltage : 3.3V

    (Can you please conform : In the Section7.3 Point R1.14 ,it has mentioned that Voltage on backup supply pin is 5.5V Max ,So It means that this pin is tolerant to max 5.5V correct ??? ,this is not Max Charging Voltage)
    5 VBACKUP Series Resistor : 20E if used without additional parallel capacitor/1K if used with additional capacitor in parallel.
    6 VBACKUP additional Capacitor : 1uF to 4uF.
    7 VBACKUP Once the Super Cap voltage reaches under 1.7V LDO of VBACKUP(LDOVRTC) turns OFF and digital core is RESET.
  • Super-cap/Coin cell, Does not require any other Charging IC to charge the Super cap as the charging volage will be provided from within the PMIC.

    Correct

    When PMIC running on the VBACKUP current consumption is 10uA.(Regulators Disabled, No Supply on the Input of PMIC Pin)

    Also correct, the device needs to be primed in a certain 'state' to reach this consumption.

    VBACKUP Charging current : 100/500uA.(Super-cap/Coin cell charging Current)

    Configurable via register writes, but yes also correct.

    (Can you please conform : In the Section7.3 Point R1.14 ,it has mentioned that Voltage on backup supply pin is 5.5V Max ,So It means that this pin is tolerant to max 5.5V correct ??? ,this is not Max Charging Voltage)

    That is correct, you can place higher than 3V3 which is that max charging voltage you're speaking on, but the tolerance is upto that 5V5.

    VBACKUP Series Resistor : 20E if used without additional parallel capacitor/1K if used with additional capacitor in parallel.

    Correct

    VBACKUP additional Capacitor : 1uF to 4uF.

    Correct, used with that additional cap/battery. The intention is with a battery.

    VBACKUP Once the Super Cap voltage reaches under 1.7V LDO of VBACKUP(LDOVRTC) turns OFF and digital core is RESET.

    This is correct, at that point nothing on the PMIC will be on and no registers are preserved for the next power up attempts with the exception of what is saved in the EEPROM (NVM defaults TPS65931211)