CSD17308Q3: Avalanche single pulse simulation (absolute max rating in datasheet)

Hello Eric,

Thanks for your interest in TI FETs. The avalanche energy formula is: EAS = ½ x L x I² = ½ x 0.1mH x (36A)² = 0.0648J = 65mJ. The CSD17308Q3 is 100% single pulse UIS tested at final test in production. As described in the technical article at the link below, sample FETs are tested to destruction during product development to determine UIS capability. The datasheet UIS single pulse limits are derated from the capability to ensure adequate margin. TI does not test, specify or recommend operating the FET in repetitive avalanche mode as this may lead to high failure rates. I'm curious why you are trying to simulate UIS. Have you had issues in the end application? Can you share your TINA-TI simulation and application schematic for review?

https://www.ti.com/lit/ta/ssztcs7/ssztcs7.pdf

Best Regards,

John Wallace

TI FET Applications

Hi John,

Appreciate your response. 

The application is class E amplifier, inductive load switching. Vg switching ~ 6-7MHz. When the load is turn off, there's Vds spike ~33V (actual measurement ~36V) but the peak isn't truncated, from datasheet it should already over the avalanche max voltage. From my calculation, each peak would give Eas < 2uJ. If this is repetitive Avalanche mode at 60Hz, the Ear would give ~40mJ. Still way below the 65mJ of absolute max ratings. What would be the risk of CSD17308Q3 failure in this case?

Btw, inductor is ~125-150nH

Hi Eric,

Thanks for the updated information. I went back thru the history of this application. We have been working with the end customer for several years. There was some concern in the past about avalanche and the customer's testing showed that the FET was not operating in repetitive avalanche mode. Has the design changed? The schematic supplied by the end customer uses a 1μH inductor.

As stated in my previous response, TI only rates our FETs for single pulse avalanche. This is the industry standard and not many FET manufacturers rate for repetitive avalanche. If they do, it is typically orders of magnitude lower than the single pulse rating. The single pulse rating is based on test-to-failure results and is then derated to ~65% of the failure current/energy for the datasheet.

The avalanche energy in this application is relatively limited and is not causing immediate catastrophic failures. Repetitively exposing the FET to avalanche can lead to long term degradation and potential failure of the device. This is due to hot carrier injection into the gate oxide which can lead to lower Vth and higher leakage currents over time. Because of this, TI does not recommend operating the FET in repetitive avalanche. However, we have not done any reliability studies of repetitive avalanche and cannot predict the failure rate or lifetime of the device under these conditions.

I created a simple TINA-TI simulation for the avalanche test circuit shown in the technical article I included in my earlier response. Using the CSD17308Q3 model available in the product folder VDS is clamped at a voltage slightly higher than 33V (which is the reverse BV of the diode used to model the FET body diode).

I'm more than happy to review the schematic and layout to see if there is any room for improvement to reduce the overshoot. You can always send it to me in a private message if you cannot share on this public forum. Or, you can email me directly at jwallaceri@ti.com.

Thanks,

John

Hi Eric,

Following up to see if I can be of further assistance. Please let me know.

Thanks,

John

hi John, thanks for the follow up. I'll come back to the avalanche issue after this. I'm working on another simulation model which requires CSD87301Q5D/CSD87302Q5D but I can't seem to find their TINA spice model. Can I send an email to you to get help on this?

hi John, thanks for the prompt response as usual. I've got the spice model and converted to Tina's using macro. First time doing it, silky smooth. Appreciate your help! 

Hi Eric,

Following up to see if your issue has been resolved. Please let me know.

Thanks,

John