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TUSB1046EVM: DP alt-mode and USB2.0

Joe Nguyen1
Prodigy 185 points
Part Number: TUSB1046EVM
Other Parts Discussed in Thread: TPS65987D, TPS65987

Tool/software:

On the TUSB1046EVM, during the DP alt-mode configuration sequence is the USB enumeration done by the TPS65987D D+/D- pins 50/53?  We plan on connecting our ULPI PHY D+/D- to the same USB Type-C pins.  Can we transmit and receive data from our ULPI PHY D+/D- after the TPS65987D is done with DP alt-mode USB enumeration while the GPU is transmitting video through the TUSB1046?  We'd like to have USB2.0 data communication regardless of whether the TUSB1046 is in USB3.1+2 lane DP or 4 lane DP mode.

  • 0
    TI__Mastermind 43796 points

    Hi Joe,

    Joe Nguyen1 said:
    On the TUSB1046EVM, during the DP alt-mode configuration sequence is the USB enumeration done by the TPS65987D D+/D- pins 50/53?

    The lanes are properly configured by the PD controller before enumeration happens. If the part is setup for 4-lane DisplayPort, then yes the enumeration will happen across the USB2 line. However, if the PD is configured for 2-lane DisplayPort and one USB3.x path, then the enumeration will happen across the USB3.x lines.

    Joe Nguyen1 said:
    Can we transmit and receive data from our ULPI PHY D+/D- after the TPS65987D is done with DP alt-mode USB enumeration while the GPU is transmitting video through the TUSB1046?

    Its best to avoid having two USB hosts on a system. You would need to program the GPU to send the commands you are looking to.

  • 0 in reply to Vishesh Pithadiya
    Prodigy 185 points

    Hi Vishesh,

    I will only have 1 lane DisplayPort and no superspeed lines. The TUSB1046EVM has the Micro-B D+/D- lines connected to the TPS65987D D+/D- and to the Type-C connector which is the same thing I plan on doing minus having the superspeed lines. 

    From slly021, it's my understanding that the TPS65987D handles the DP alt-mode configuration sequence below.  It only shows D+/D- for USB enumeration.  Is this not the same configuration sequence for USB 3.1 + 2 Lane DP?  Are you saying I can only transfer data with USB3 superspeed lines and not USB2 highspeed lines?  

    I have only tested the TUSB1046EVM in the following configurations:

    4 Lane DP:

    PC DP --> TUSB1046EVM --> USB-C monitor

    USB3.1 Only:

    PC Micro-B <--> TUSB1046EVM <--> USB-C flash drive

    I have not tested the TUSB1046EVM in USB 3.1 + 2 Lane DP.  Would this test setup work?  A monitor with both a Type-C input for DP and Type-A ports like the Dell 27 4K UHD USB-C Monitor - S2722QC.  The Type-A ports I believe is an internal hub inside the monitor.  PC DP and Micro-B to TUSB1046EVM and then a USB-C cable to the monitor with a flash drive in the Type-A port on the monitor.  This way I can test both video and data at the same time, but the data is only USB2 because of the Type-A port, which is why I thought I could forgo the USB3 superspeed lines.

    On a side note, what is HPD1(GPIO3) pin 30 of the TPS65987D configured as on the TUSB1046EVM?  The port capability is DP DFP_D only so is HPD1(GPIO3) configured as an output (HPD TX)?

  • 0 in reply to Joe Nguyen1
    TI__Mastermind 43796 points

    Hi Joe,

    Joe Nguyen1 said:
    Is this not the same configuration sequence for USB 3.1 + 2 Lane DP?  Are you saying I can only transfer data with USB3 superspeed lines and not USB2 highspeed lines?  

    Yes this is correct.

    When you are using 4 lane DP, your understanding is correct. Because all 4 SS lanes will be used to transmit video data the USB2 path will be the the only path to transmit USB data, thus the device connected will enumerate at USB2. However, when using 2x DP and 2x SS USB mode, the USB3.x path will enumerate first before the USB2.0 path. This will result in a USB3.x connection.

    Joe Nguyen1 said:
    I have not tested the TUSB1046EVM in USB 3.1 + 2 Lane DP.  Would this test setup work?  A monitor with both a Type-C input for DP and Type-A ports like the Dell 27 4K UHD USB-C Monitor - S2722QC. 

    This may work, but it will ne difficult to implement with the EVM, as the DP and USB3.x signal will be on the same USB-C cable. In this case you will have a lower max resolution, but you should still be able to communicate across the SSTX and SSRX lines at the same time. 

    Joe Nguyen1 said:
    On a side note, what is HPD1(GPIO3) pin 30 of the TPS65987D configured as on the TUSB1046EVM?  The port capability is DP DFP_D only so is HPD1(GPIO3) configured as an output (HPD TX)?

    I will ask the designers and get back to you shortly. 

  • 0 in reply to Vishesh Pithadiya
    Prodigy 185 points

    Hi Vishesh,

    Vishesh Pithadiya said:
    However, when using 2x DP and 2x SS USB mode, the USB3.x path will enumerate first before the USB2.0 path. This will result in a USB3.x connection.

    We only have 1 DP lane and no USB3.x SS so shouldn't the TPS65987D enumerate with the USB2.0 path? 

    If we're only using 1 DP lane does it matter whether the switch is  configured for 4 lane DP or USB3.1 + 2 lane DP?

  • 0 in reply to Joe Nguyen1
    TI__Mastermind 43796 points

    Hi Joe,

    Are you saying the only data pins connected across the USB-C cable will the single lane of DP and the USB2.0 bus?

  • 0 in reply to Vishesh Pithadiya
    Prodigy 185 points

    Yes, if that's feasible

  • 0 in reply to Joe Nguyen1
    TI__Mastermind 43796 points

    Hi Joe,

    Yes that should be feasible.

  • 0 in reply to Vishesh Pithadiya
    Prodigy 185 points

    Hi Vishesh,

    Have you heard back from the designer about whether HPD1(GPIO3) pin 30 of the TPS65987D on the TUSB1046EVM is configured as an input or output?

    Thanks,

    Joe

  • 0 in reply to Joe Nguyen1
    TI__Mastermind 43796 points

    Hi Joe, its configured as an output. 

  • 0 in reply to Vishesh Pithadiya
    Prodigy 185 points

    Hi Vishesh, thanks for the answer.  I have the file for the EVM.  Can you tell me where I can see how the GPIO are configured as inputs or outputs?  I'd like to know if GPIO 0-2 are inputs or outputs also.  This is what I see in "I/O Config"

  • 0 in reply to Joe Nguyen1
    TI__Mastermind 43796 points

    Hi Joe,

    The GUI was configured by the PD team at TI so I will reassign to them. from my understanding the event type automatically sets it as input or output.

    I can provide the firmware we used on the EVM as a reference. 

    6574203J_Firmware.zip

  • 0 in reply to Vishesh Pithadiya
    TI__Mastermind 37655 points

    Hi Joe,

    The GPIO direction for specific events is described in the device TRM in the gpio events table. Port Cable Orientation is an output.

    https://www.ti.com/lit/ug/slvubh2b/slvubh2b.pdf?ts=1723582028414&ref_url=https%253A%252F%252Fwww.ti.com%252Fsitesearch%252Fen-us%252Fdocs%252Funiversalsearch.tsp%253FlangPref%253Den-US%2526nr%253D292%2526searchTerm%253DTPS65988+HOST

    Joe Nguyen1 said:
    the USB enumeration done by the TPS65987D D+/D- pins 50/53?

    No, the TPS65987 does not do any USB2 enumeration on the D+/D- lines and does nothing with data regarding USB2. The D+/D- connections are there to support the BC1.2 legacy charging scheme. If you do not need to support BC1.2, theses GPIOs do not need to be connected to the D+/D= lines.

    Thanks and Regards,

    Chris