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TPS7B81-Q1: Which spec of LDO determines the time needed to drop from 1.25V to 0.3V

Jayden Li
Expert 3235 points
Part Number: TPS7B81-Q1

Tool/software:

Hi team,

For a fixed load and output cap. Customer observed that when disable the output, it takes 166ms to drop from 1.25V to 0.3V, which customer think a little longer for their MCU. And they found the LDO from different supplier has a big difference between the time from 1.25V to 0.3V, they tested it in the same board.

Support need:

  • For a fixed load and cap, which spec of LDO determines the time needed to drop from 1.25V to 0.3V

Thanks!

Jayden Li

  • 0
    TI__Guru 50025 points

    Hi Jayden,

    Some devices have an active pulldown mechanism that helps to discharge the output when the device is disabled, and maybe the other device has that feature. TPS7B81-Q1 does not have an active pulldown, so when the device is disabled, the channel is closed (goes high impedance) the output falls according to the load and output capacitor. What is the load and output capacitor they are using?

    Regards,

    Nick

  • 0 in reply to Nick Butts
    TI__Expert 3235 points

    Hi Nick,

    All the LDO they tested do not have active pulldown. The load is MCU, and they confirmed they tested in the same board, so both the cap and MCU load is exactly same. They want to understand what inside chip will affect the timing? Like the internal divide resistors?

    Thanks!

    Jayden Li

  • 0 in reply to Jayden Li
    TI__Guru 50025 points

    Hi Jayden,

    Sorry for the delayed response. If there is no load (e.g. once the MCU turns off) then I would expect the main discharge path to be the resistor divider. There may be some other high impedance leakage paths that would vary between devices, but I would expect the resistor divider to be the lowest impedance leakage path. 

    Regards,

    Nick