Other Parts Discussed in Thread: TPSM63603
Tool/software:
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Tool/software:
Hi Andy,
Yes power modules should be fine but the options you gave me above seems to have low voltage than I expect to have. Can you tell me what resistor/capacitor value should I use for both of the options you mentioned so that I can get 8V out?
Looking for ward for your response.
Thanks,
Sanjana
HI,
Fsw=1.3MHz, Effective Cout>22uF, RFBT=69.8K, RFBB=10K for two options.
Hi Andy,
Thank you so much for helping me with this. This seems to work for our design. Do you happen to have an Altium file for both of those options? We are planning to design a small pcb after testing the eval board. Could you please send the Altium file to: renganathadesigan@quantumcircuits.com please?
Thanks,
Sanjana Desigan
Hi Andy,
Thank you! I will take a look at that.
I have received the TPSM63603 evaluation board from DigiKey. I plan to solder the resistor value you suggested, 69.8 kOhm. However, the evaluation board provides multiple output voltages (12V, 7.5V, 5V, 3.3V, and 2.5V) according to the schematic, with the RFBT resistors connected in series to achieve these values.
I was wondering if I could change the value of resistor R9 to 30 kOhm to obtain 8V instead of 7.5V. I was wondering if this adjustment work as expected? Since I'm new to this, I would greatly appreciate any guidance you can provide. Kindly let me know.
Thank you,
Sanjana
Hi,
RFBB=R5=10K,
RFBT=R6+R7+R8+R9=69.8K
So R9=69.8-15-8.06-16.9=29.84K, and connect J6 Pin 3 and Pin4 for 8Vout.
Hi Andy,
Thank you very much! I have tested the evaluation board with the correct resistor value, and it seems to work really well with our system.
I do have one concern—I am currently designing a small PCB in Altium using the TPS63602, and I noticed that the resistor values in the schematic (in the eval board guide) differ from those in the Bill of Materials. Could you clarify which appropriate resistors and capacitor values I should use, should I consider the schematic or the Bill of materials? It would be great if you could confirm this.
Thanks,
Sanjana
Hi,
Pls refer to the EVM circuit and BOM, you send out the circuit and PCB layout for review later...
Hi Andy,
Thank you.
I have completed the schematic for a 12V input and 8V output configuration. I had a few points I wanted to confirm with you:
VLDOIN Pin: According to the datasheet, this pin should be connected to VOUT if the output is ≤12 V, or to GND if VOUT is >12 V. In my schematic, I've connected the VLDOIN pin to VOUT through resistor R17.
CBOOT and RBOOT: The datasheet suggests connecting these pins together for improved efficiency, which I’ve implemented in the design as well.
SW Pin: I have left the SW pin floating since the datasheet doesn’t specify anything about this, and it’s not needed in my application too.
Could you please confirm if the above points look good? I’ve also attached a screenshot of the schematic for your reference.
Looking forward to your feedback. If there is anything you feel is wrong from my schematic, kindly let me know I can do that modifications to my design.
Thank you,
Sanjana Renganatha Desigan
Hi,
Pls short RBOOT and CBOOT pin with 0ohm resistor in case you may need to optimize EMI in future.
Other design looks OK!
Hi Andy,
Our team was wondering if this eval board have any settings in such a way that we get low noise and high reliability because they go inside the quantum enclosures and will never comes out. So we would like to know the expected product lifecycle or roadmap?
Thank you,
Sanjana Desigan
Hi,
Do you know the average load current? and ambient temp in the enclosure?
Hi Andy
One other question my teammate had — during our risetime and fall time testing with the evaluation board was, we noticed that it takes some time for the capacitor to discharge completely. We observed a residual voltage of around 1V and it goes to 0V after few seconds.
Do you have any recommendations for how we can address this in our schematic since our quantum measurements are very critical? Below is the schematic we're currently using:
Here is the screenshot my teammate gave me. It seems that we do see a very minimal voltage after the fall time. Kindly let us know what your thoughts are about this.
Hi,
It can be solved by two way:
1. if the PCB design is fixed, then use much smaller feedback resistor value
2. if the layout design can be changed, then add one dummy load resistor on output to GND to discharge the Cout more quickly. you can try from 1K, and reduce it till discharge time meet your requirement.