Tool/software:
All,
I'm working on a design based on the BQ25638 charger. In order to keep the cost low I'm trying to avoid any via in pad PCB process. This naturally forces some restrictions on access to various pins. It also raises some thermal dissipation concerns that I'd like some feedback on.
First let's consider the pins. In order to gain access to pins that I need for the design I must leave the following pins floating by removing the pad underneath them and putting solder mask over a trace in the pad location.
The three signals I will float are:
STAT pin seems OK to NC. It's just an open drain output.
ADCIN also looks OK to NC As we are not using this function
ILIM also looks OK to NC as this function can be disabled in software and a programmable threshold set.
Again, I'd like confirmation that these pins are OK to float as long as I do not require the functions they support.
My next concern is thermal dissipation if I don't have bias directly under any of the pads. I understand this may not be as effective as the eval board design which uses via and pad for more direct connection from the device pins to the large ground and power shapes on the PCB. My plan is to route out the high current traces on the top layer and then via to the large shapes just outside the outline of the BQ 25638.
In my favor though I've selected this part primarily for very high efficiency and intend to charge at no more than 2.0A.
Appreciate any feedback on all these questions.
