UCC28700-Q1: UCC28700

Hello,
I have attached some measurements result from my circuit during the startup pulses that never help awakes the controller.
Below, in Yellow is the VDS of the power FET, Blue is the VS voltage, and Green is the VGS of the power FET.

Here is a zoom-in version>

Since you suggested that the sense resistor might be too large (RCS= 3.65 Ohms according to Webench calculations). I attached below the voltage across the sense resistor, Yellow is the VDS of the power FET, Green is the VGS of the power FET and Blue is VCS across the sense resistor.

I still have no idea why the controller is unable to startup the flyback! 

Are you trying to start up at full load or no load? If at full load, please try to reduce the load first.

I am testing at no load condition.
Have you noticed any abnormal behavior in the attached measurement signals?

Hi Ning,
I have tried most of the debug suggestions, still the converter is not able to start up.
This is how my original schematic looked like:



Here below what I tried:

-  Increasing VDD capacitance from 1.5uF to 4.7uF and even 10uF --> even worse!
-  Decreasing output capacitance --> didn't affect anything
- Decreasing the resistor in-series with an auxiliary diode --> I removed the resistor RF1 (22 Ohms)

Below I attach another oscilloscope measurements for VDS, VS, VCS, and Vaux voltages, in case it might give you any idea what would be the fault.

Hello JCHK;
Sorry I pressed "This resolved my issue" by mistake.
We still have the issue. 

Regarding your question, yes we have a lot of ringing due to high leakage inductance of the transformer, I believe!

Apart from the ringing, we didn't notice any damage in the FET since the VDS looks clean and seems that the current DZ snubber circuit is acting effectively to limit any spike on the FET drain.

I need to confirm if the turns ratio NA/NS=1 is enough or not, because our targeted output voltage is 12V while the VDD has a minimum value more than this. Can you please confirm, maybe it's something wrong in the turns ratio of the auxiliary winding.

The dots in my circuit is the correct one, actually the schematic I am copying above is the schematic used by TI in their calculator tool for UCC28700, I just copied it as a reference only. I assure you that I have the correct polarity in my circuit.

Regarding the VDD, I see a sawtooth shape for VDD trying to startup till 21V then it goes back to 8V in a triangular shape and that goes forever. The VDD never stabilizes. 
The thing about the turns ratio of NA/NS= 1 might be the problem since my Vout=12V and if the auxiliary winding has the same number of turns it means that the steady-state VDD would also equal to 12V. Can you confirm if a steady-state value of VDD= 12 is enough or it will trigger the UVLO because the VDD has to be always higher than 21V "what's called VDD(ON)" in the datasheet!