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TPS4811-Q1: Input Capacitance and Inrush Current

Part Number: TPS4811-Q1

Tool/software:

Hello,

We have a board that has 1.5 mF input capacitance. We are using the TPS4811 with a Vishay SQJQ184E Mosfet to manage the power input to the board. 

Nominal voltage is 28 V, over voltage threshold is set to 33V.

Naturally we forgot about the input capacitance and while testing for the over-voltage threshold the Mosfet worked fine to switch off the power input but while testing the recovery level we had 32.5 V switching onto 1.5 mF. This resulted in the Mosfet Gate and Source shorting probably due to the substantial inrush current. 

We currently have that the gate pull up turn on slowed down to 2 ms with a 68 kOhm series resistor. 

For what I understand the best approach would be first to reduce the input capacitance as much as possible without impacting the performance of the rest of the circuit. 

Second would be to adjust the gate pull up time. 

Should I go slower? Aim for 20 to 50 ms turn on time? Or should I just go faster? 

The pre charge circuit would have been ideal but we require the over voltage protection. 

  • Hi Martin,

    The FET SOA looks like it may able to handle turning on with no slew rate control, if your input supply can handle it. Otherwise, the SOA looks to be fine if you limit the inrush to under 10A during turnon, which according to Eq 2 in the data sheet would be 5ms.

    Another approach you can try is to PWM INP with no gate slew rate control. This will limit the duration of the inrush that the FET sees and improve its thermal capability.

    Do you think either of these would work for your application?

    Thanks,

    Patrick

  • Hi Patrick,

    thank you for your reply. We ended up slowing down the turn-on time to over 5 ms and thereby reduced the inrush current below 10A. This placed us well within the SOA with sufficient margin to deal with the inrush after having turned off due to over-voltage.

    Thank you for the support,

    Martin