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TPS3808: RESET status when 0.8V < VDD < 1.7V

Part Number: TPS3808

Tool/software:

Hi team,

My customer has a design with TPS3808G1, and the sequence is SENSE first (> VIT + VHYS), and then VDD (3.3V) goes up. Engineers need to know the SENSE state when the VDD transient period goes from 0.8V to 1.7V. Could you help answer this? Thank you!

From the datasheet, the recommended operating minimum VDD is 1.7V and the SENSE state is undefined when VDD < 0.8V.

Regards,
Sam Ting    

  • Hi Sam,

    Thanks for your question!

    For the TPS3808, please see the screenshot below regarding device functional modes:

    Following section 8.4.2, RESET will stay asserted while VDD is between Vpor and VDD_min no matter the state of the SENSE pin.

    I hope this helps!

    Best Regards,

    Andrew Li