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LDO-PARAL-DESG-EVM: TPS72301DBVT

Om sai ram
Prodigy 20 points
Part Number: LDO-PARAL-DESG-EVM

Tool/software:

we are using TPS72301DBVT as -5V to -3.3V converter. but we are getting Output ripple more than 100mV.  We used all the Input, output capacitors according to Datasheet.

am not able to find the reason. 

hope you will resolve my issue, thanks in advance.

  • 0
    TI__Genius 13720 points

    Hi Om Sai Ram,

    Please send me a schematic of your solution which shows the LDO implementation. Since this concerns a ripple on the output, please also share how the LDO is powered (switching converter/ another LDO)? Please share types and ratings of output and input capacitors. Share any scopeshots you may have taken which shows the ripple on the output and the VIN and VFB signals.

    Regards

    Ishaan

  • 0
    Prodigy 20 points

    The Input voltage is very clean without having any ripple effect, Even if we increase the capacitor value, there's a change in period but not in output ripple  (TPS72301DBVT) . We are trying to simulate with Tina simulation but we are not getting the direct Part No.

  • 0
    Prodigy 20 points

    is there any other way to reduce the ripple.  we added more than 40uf at TPS72301DBVT but still no improvement. 

  • 0 in reply to Om sai ram
    TI__Genius 13720 points

    I am not able to tell how much is the pk-pk ripple from the scopeshots. Please share pk-pk ripple value and frequency of the ripple on both the input and the output of TPS72301DBVT.

    Which capacitor value have you been increasing?

    Can you please indicate on the schematic where exactly you are measuring the ripple? Can I see a picture of your test setup?

    The TPS72301 will have higher PSRR at lower frequencies so if you are using a switching supply to power the LDO, switching to a lower, fixed frequency will reduce the ripple.