TPSM8D6C24: SW node

Hirotsugu Kobayashi

Mastermind 9530 points

Part Number: TPSM8D6C24
Other Parts Discussed in Thread: TPS546D24A,

Tool/software:

Hi team,

I changed the input voltage on the evaluation board and measured the peak voltage of the SW terminal.

It rose almost in proportion to the input voltage up to 14V, but at 15V the peak disappeared.

Why is that?

5 months ago

0 Tahar Allag 5 months ago

TI__Mastermind 32360 points

Hello Kobaya,

can you measure the input current as it switcher for both VIN 15V and 16V.

Thanks!

Tahart

0 Savith Kumar Rayakanti 5 months ago in reply to Tahar Allag

TI__Expert 5840 points

Hello Kobaya,

It is a PVIN voltage based change to the pull-up driver strength to provide a strong drive strength for high efficiency at 12V input, while protecting the MOSFET from over-voltage at elevated VIN.

The threshold is set around 14.75V. That allowed us to optimize the gate drive pull-up strength based on protecting the MOSEFTs from the ringing at 14.75V, but weaken the driver for higher VINs to avoid MOSFET damage even if VIN rises to 18 or even 19V. This dynamic gate drive strength helps in better efficiencies and higher PVins.

Thank you

Savith

0 Hirotsugu Kobayashi 5 months ago in reply to Savith Kumar Rayakanti

Mastermind 9530 points

Hi Savith,

Thank you, I understand that the driver strength changes with VIN.
How much does the drive strength differ between Strong and Weak?

0 Tahar Allag 5 months ago in reply to Hirotsugu Kobayashi

TI__Mastermind 32360 points

Hi Kobaya,

we are looking into this.

Thanks

Tahar

0 Tahar Allag 5 months ago in reply to Tahar Allag

TI__Mastermind 32360 points

Hello Kobaya,

The pull-up strengths were optimized maintain peak switch node ringing less than 19.5V with a 14.5V input (strong) and 19V input (weak) so that designs would meet the absolute maximum switch node ringing without a snubber while maintaining the best possible efficiency. So, the pull-up resistances for "weak" drive has half of the gate drive current as the "strong" drive. This has an effect on how much the rise time and the overshoot it will results during the turn on of the HS-FET without having the snubber circuit.

Thanks!

Tahar

0 Hirotsugu Kobayashi 5 months ago in reply to Tahar Allag

Mastermind 9530 points

Hi Tahar,

The measurement was performed on a TPSM8D6C24EVM.

When the input voltage is 14V, the peak voltage is 20.21V.

Will this cause a malfunction?

Is there a way to reduce the peak voltage?

0 Savith Kumar Rayakanti 5 months ago in reply to Hirotsugu Kobayashi

TI__Expert 5840 points

The actual voltage from SW to GND seen by IC is measured at the pins of IC on the Module, can you probe SW to GND pins of TPS546D24A IC on the module?

Thank you

Savith

0 Hirotsugu Kobayashi 5 months ago in reply to Savith Kumar Rayakanti

Mastermind 9530 points

Hi Savith,

No, the measurement was at the SW terminal of the module.

Please wait while we remeasure between the IC terminals.

The TPSM8D6C24 does not have a rating of 19.5V.

Do the ratings for the TPS546D24A also apply to the TPSM8D6C24?

0 Savith Kumar Rayakanti 5 months ago in reply to Hirotsugu Kobayashi

TI__Expert 5840 points

Hi Hirotsugu,

TPSM8D6C4 uses TPS546D24A IC internally, and the module datasheet does not have SW abs.max (SW is only for debug and not for design use). want to check with your use condition what is the Voltage at SW to GND at the IC.

Thank you
Savith

0 Hirotsugu Kobayashi 5 months ago in reply to Savith Kumar Rayakanti

Mastermind 9530 points

Hi Savith,

Generally, the voltage of the SW node is not checked in module products, but is there any chance that the SW node will exceed its rated voltage due to the layout?

0 Savith Kumar Rayakanti 5 months ago in reply to Hirotsugu Kobayashi

TI__Expert 5840 points

Hi Hirotsugu,

I did check the above 14Vin condition on Bench with EVM and the measurement can slightly vary with measurement techniques and the above shown data should be ok

Thank you

Savith

0 Hirotsugu Kobayashi 5 months ago in reply to Savith Kumar Rayakanti

Mastermind 9530 points

Hi Savith,

I re-measured the peak value at the IC terminal.

At 13.2V it does not exceed the rated value, but it does exceed the rated value at the voltage just before the drive becomes weak.

・Will it be damaged as long as it is used at 13.2V?

・Please tell me your opinion on the SW terminal exceeding the rated value even though it is within the product's input voltage.

0 Savith Kumar Rayakanti 5 months ago in reply to Hirotsugu Kobayashi

TI__Expert 5840 points

Hi ,

Yes working on this will get back to you as soon as possible

Thank you
Savith

0 Savith Kumar Rayakanti 5 months ago in reply to Savith Kumar Rayakanti

TI__Expert 5840 points

At 19.78V, we are not expecting the FET to be damaged due to that fact that there is an internal clamping diode that protects the FET at voltage just above 19.5V.

Thank you

Savith

0 Hirotsugu Kobayashi 5 months ago in reply to Savith Kumar Rayakanti

Mastermind 9530 points

Hi Savith,

There is no mention of such a protection diode in the datasheet.

What is an internal clamp diode?

Does it function like a TVS and prevent the FET's withstand voltage from being momentarily exceeded?

0 Savith Kumar Rayakanti 5 months ago in reply to Hirotsugu Kobayashi

TI__Expert 5840 points

Hi Hirotsugi

The internal protection diode is an avalanche diode integral to the MOSEFT's silicon construction. They are drawn in the block-diagram of the MOSFETs

its a separate, intentional drain-source avalanche diode engineered into the geometry of the MOSFET so that it keeps avalanche current away from the gate and body and electrically in parallel with Body diode

Thank you

Savith

0 Hirotsugu Kobayashi 5 months ago in reply to Savith Kumar Rayakanti

Mastermind 9530 points

Will it protect against avalanche breakdown even in the event of a large spike?

+1 Savith Kumar Rayakanti 5 months ago in reply to Hirotsugu Kobayashi

TI__Expert 5840 points

The FET is unlikely to damage for voltages below 20V

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TPSM8D6C24: SW node