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LMG2100R026: Dead Time Provision

Srikrishna Y H
Prodigy 30 points
Part Number: LMG2100R026

Tool/software:

Hey TI Team,

    I'm planning to use LM2100R026 for implementing Constant Current based Buck Converter in one of my applications. When I went through the Datasheet, it says that internally its handling Dead Time which is less than 10nS. My question is whether, this Dead Time is sufficient for my application (avoiding cross Conduction of HFET & LFET) as I haven't given any external provision for handling Dead Time. Does it have sufficient provision of handling dead time by itself.

    If this provided Dead Time or Dead Time Handling isn't sufficient, how can i ensure that i provide sufficient Dead Time for my Half Bridge. Should I provide any external Dead Time provision (using passives or IC's) in such cases. I need more clarity on this so that i don't end up shorting my boards after power up.

                                                                                                                                                           Awaiting your response.

  • 0
    TI__Expert 4855 points

    Hi Srikrishna,

    The datasheet is simply stating that the propagation delay mismatch between the HI and LI inputs allow for very tight dead-times (<10ns) to be implemented if the user desires.

    The LMG2100 has no internal dead-time control. The dead-times should be managed externally in the signals that feed the HI and LI pins.

    If you are working with an external synchronous buck controller, its datasheet should explain how/if its dead-times should be adjusted from its outputs. If working with an external signal generator, ensure sufficient dead-time between LI-HI and HI-LI. If only providing one PWM signal, ensure you have an external circuit to create a complementary signal with added dead-time.

    We don't have all the details of the application, so it is not possible to provide a dead-time recommendation. I would recommend to maybe start with 20ns of dead-time.10 ns of dead-time should realistically be the minimum that is implemented here to avoid a shoot-through event between HS and LS FETs.

    Thanks,

    John

  • 0 in reply to John Gomez
    Prodigy 30 points

    Hi John,

       Thank you for replying to my query.

     Now I'm Quite Clear that I need to make external provision for the Dead Time. But still I'm Unclear about  how to figure out Dead Time for my application as I'm not using any Buck Controller (rather I have implemented current  feedback based control loop using few discrete components such as shunt, op-amp, comparators, s-r flip flop and and/or gates).

     Just to give you more details regarding my application, I am basically implementing Constant Current based Buck, wherein I'm Sensing current at the output of Converter using Shunt, after which I'm amplifying it differentially using diff amp & comparing it against upper and lower reference values of current using Window Comparator. Output of this comparator goes to s-r flip flop and finally I'm using Q and Q' i.e Output of  Flip flop as input to HI & LI. 

         Now for this case please let me know where and how should i provide dead time? Along with it how much should be my dead time delay? Would it be okay If I add R-C based delay at the input of HI-LI i.e at the output of Flip- Flop. 

        As any SPICE model isn't available for this Part, I'm not able to carry out any simulations, where in I can experiment and validate these things such as introduction of dead time delay using R-C (passives) or if my existing control loop is able to cater for dead time on it's own without any external circuit.

  • +1 in reply to Srikrishna Y H
    TI__Expert 4855 points

    You may refer to an external dead-time generating circuit that we've used for the EVM of a different device - https://www.ti.com/tool/LMG342X-BB-EVM#design-files. In the user guide for this EVM, you can find the dead-time generating circuit below:

    Perhaps you can implement something similar in your application. In this circuit, the PWML input is applied externally through a signal generator. Then R3, C10, R15, C23 are adjusted to provide the required dead-time for HI-LI and LI-HI.

    Regarding SPICE modeling, an LMG2100 device model is not required to obtain insights into the dead-time required for the application. A simple half-bridge with ideal switches can be used. 

    Thanks,

    John