TPS6594-Q1: How to return to Watchdog long window

Hi expert，

Add another question.

Q3：Enter the long window by setting register bit(WD_RETURN_LONGWIN=1)，does the device force ENABLE_DRV=0?

best regards

wl.wang

Dear team,

Any updates on this thread? This is an urgent case from my customer. Thanks!

Regards,

Mingkang

wl.wang said:

Q1.When received SW upgrade command，the system set WDG return to long window(WD_RETURN_LONGWIN=1)，and set it to stay in long window(WD_PWRHOLD=1)，but the watchdog just reboot immediately，how can let it stay in long window?

When you set WD_RETURN_LONGWIN=1, the PMIC does not IMMEDIATELY return to the long window. It goes there after completion of the current watchdog sequence, after Window-2 ends. That means you must end the current sequence with  WD_FAIL_CNT < WD_FAIL_TH. 

Easiest way to do that is continue providing answers to finish the sequence and head to the long window.

I recommend writing WD_PWRHOLD=1, once PMIC is in long window. 

wl.wang said:

Q3：Enter the long window by setting register bit(WD_RETURN_LONGWIN=1)，does the device force ENABLE_DRV=0?

A Warm Reset would force EN_DRV=0. Using WD_RETURN_LONGWIN=1 will not force EN_DRV=0.

Hi expert，

As the following log，I print all WDG register values，and wait the current sequence to finish，then set WD_RETURN_LONGWIN=1 successfully，but set WD_PWRHOLD=1  fail，the watchdog just warm reset immediately，why can't set WD_PWRHOLD bit?

best regards

wl.wang

HI expert，

Another case，I set WD_RETURN_LONGWIN=1 firstly，wait for current WDG sequence finished，then set WD_PWRHOLD=1 immediately，read back register 0x406，i found that WD_PWRHOLD be setted fail also，the device just do warm reset.

best regards

wl.wang

Thank you for your inquiry. US and Europe TI offices are closed on April 18th. This thread has been assigned but you will receive a response early next week. Thank you for your patience!

Regards,

Katie

Hi Katie, and Michael, 

Thanks for your reply! This is Mingkang, FAE supporting this customer.

They want to replace TPS3890-Q1(TPS389033GQDSERQ1) with watchdog in PMIC TPS6594133ARWERQ1. Before answering the questions from customers:

Could you pls give a quick judgement if it's possible? Could you pls give the comparison between TPS3890-Q1 and the WG in TPS6594-Q1?  

I would arrange a meeting between customers and BU if needed due to the urgent schedule. Really appreciate your support!

Regards,

Mingkang

wl.wang said:

Another case，I set WD_RETURN_LONGWIN=1 firstly，wait for current WDG sequence finished，then set WD_PWRHOLD=1 immediately，read back register 0x406，i found that WD_PWRHOLD be setted fail also，the device just do warm reset.

How are you confirming that the PMIC has returned to the long window before trying to set WD_PWRHOLD=1?

Did you confirm that WD_FIRST_OK=0 after returning to long window?

What line is the command to set WD_PWRHOLD?

Hi expert，

At the moment of line 159，I set WD_PWRHOLD=1，and read back register 0x406 = 0x3 in line 160，it shows that WD_PWRHOLD=0 in BIT2

Register 0x40a =0x62，it shows WD_FIRST_OK=1 in BIT5

best regards

wl.wang

On line 15, 0x40A = 0x62. This just means the FIRST sequence finished. 

After line 18, read register 0x40A. bit 5 WD_FIRST_OK=0 if the PMIC is back in the long window. Once you have confirmed the PMIC is back in the long window, THEN set the WD_PWRHOLD bit.

I need to make correction to my answer here. 

Michael Gambrill said:

Q3：Enter the long window by setting register bit(WD_RETURN_LONGWIN=1)，does the device force ENABLE_DRV=0?

A Warm Reset would force EN_DRV=0. Using WD_RETURN_LONGWIN=1 will not force EN_DRV=0.

A return to the longwindow will set WD_FIRST_OK=0 and set EN_DRV=0.