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TPS3840: RESET behavior not in line with datasheet

Part Number: TPS3840

Tool/software:

I have a design below, I am using this to shutdown any ICs that are using +5V in the event of an undervoltage condition. I am specifically using a TPS3840PH45, so the expected behavior is for the RESET to output a HIGH signal during active events when the voltage drops below 4.5V until it comes back above 4.7V.

On startup, with my entire system connected, I will sometimes see that the TPS3840 RESET line is held high despite the inputs being valid:
Vdd = 5.26

nMR = 5.26

With these conditions, the RESET line should be inactive (LOW) but instead it is outputting a constant 5.26V. This is happening on multiple units. Please advise if my design is incorrect, and ideally why this unexpected behavior might be occurring

**For reference, the 5V_Supervisor line is the output of my regulator and it is only fed into this power supply and the source of the PMOS. the +5V net is power delivered to the rest of the board. This is then passed onto another board via ribbon where I have the same circuit for +3.3V. If I power on this board without the ribbon attached (or attach while already powered) it does not have this issue.

  • Hi Nick, Thanks for your question!

    There might be some parasitic capacitor interfering with CT pin, which might be affecting the CT delay when you connect the 3.3V board. It seems like when it's not connected the device is working as expected, and once you connected to other board you are experiencing this issue.

    I would recommend probing the CT pin at power up with and without the other board is connected to see if there is any change. 

    Hope this helps!

    Best,

    Sila