BQ25856-Q1: Power passive component reccomended values implications

Hi Nicolas,

The minimum capacitance comes from voltage ripple like you mentioned as well as input current ripple. Ceramic capacitors with a low ESR handle the input voltage ripple which allows the bulk capacitors to handle the current ripple. What we look for is the worst-case scenario of input current ripple as mentioned in section 8.2.1.2.5 of the datasheet. The impact of having 10 uF would be a large ripple on your input that can affect the rest of your circuit, especially the output. There is more information on selecting capacitors here:

• PTHxxxxx.pdf

The inductor value comes primarily from the switching frequency. If the inductor is not paired with an acceptable switching frequency, the current ripple will be higher and cause a larger ripple on your output. We have equations in section 8.2.1.2.4 of the datasheet to help you select this value.

I do not think that 22 uH and 10 uF will be compatible with this device. Let me know if I can clarify things further.

Best,
Michael

Hi Michael,

Thanks for your prompt response. 

AFAIK the input current ripple has little to do with the input capacitance. It does if you are constraining yourself to an electrolytic capacitor, but that's not my case.

The current rating of MLCCs is huge thus the current ripple requirements are very easily met. My capacitance requirement was calculated as:

	##input capacitor calculation
	dv_req_vin = 2;

	duty = dutyBuck(max(vin), min(vbat))%closest to 0.5 is the worst case
	Ci = iout * duty .* (1 - duty) ./ (fsw * dv_req_vin)
	irms_ci = iout * sqrt(duty * (1 - duty))

And that leads to a Ci of 5.4uF, and a irms rating of 4.86A. Both requirements can be met through MLCC. I checked and it's the same equation used in the suggested AN.

I have checked the document you shared, specifically the section about input capacitor sizing. It overconstrains the design. For example it indicates a bulk capacitor is necessary for transients, but that will only happen in case your load transient is faster than your input can react which won't be true in some cases. I don't want to linger on the topic, but for example it states 'Only ceramics have the extremely low ESR that is needed to reduce the ripple voltage amplitude', I don't even understand what it means, MLCCs will have initially most of the current through them in a current divider between an MLCC and an electrolytic but that's because of ESL. I thought it was a typo but then it's kinda repeated. In any case, I don't think this document is a great source of information.

In any case, my question was really how will the value of the passive components affect the controller itself, which as per my understanding is the only information that should be available in the datasheet, leaving system level impacts agnostic to the controller open for the designer to decide whether they are problematic or not.

Thank you very much and I hope my comments are not seen as mean. I think it was Bogatin who said ANs were assumed wrong until proven correct.

Hi Nicolas,

I spoke with the team for this part today. You are correct, your value should work for ripple conditions, but that isn't the only consideration in the datasheet. The 80 uF comes from stability issues and the converter feedback loops. The device has a lot of use cases, so there are a lot of things to consider with the feedback loop. There is a minimum and maximum capacitance range that works with the compensation loops that was determined by simulations and bench testing.

Best,
Michael

Hi Michael,

With power flowing from charger to battery, the input capacitor (i.e. the capacitor in the charger side) has little effect over system stability. It is important when considering Middlebrook stability criterion but I don't think that's what is being discussed.

In the datasheet in section "8.2.1.2.9 Converter Fast Transient Response", the stability of the converter with reversed power flow is studied. And there, the 80uF are suggested. Then, is the 80uF as well as the inductance limits requirements only relevant for reversed power flow?

Is there any C and L requirement if the reversed power flow mode is not used?

Regards

Hi Nicolas,

In the datasheet section 8.2.1.2.9, the datasheet recommends 80 uF for converter stability. This stability listed here is recommended for forward mode operation as well. The inductance and capacitance limits are relevant for both forward and reverse power flow.

There are no different C or L requirements when reverse power flow mode is not used. Like I mentioned previously, the device has many use cases, and the datasheet must consider all of these. There are multiple internal loops that we are ensuring to compensate correctly for. 

Like all things engineering related, there are tradeoffs and assumptions. Our datasheet must take all typical applications into account in order to achieve a reliable design. You can design a system around our part outside of the assumptions that our datasheet makes and choose values outside of our recommendations, but you risk trading stability on the device. We are confident in the recommendations given in the datasheet, but you are welcome to validate your own design under your unique requirements to ensure that you have made a functional design.

Best,
Michael

Hi Michael.

In the datasheet, it is stated: "The device integrates all the loop compensation, thereby providing a high density solution with ease of use.". Please realise the high density argument is not valid if the integrated loop compensation requires the designer to include a huge 80uF capacitor, which might not be much area-wise but is awful height-wise. Achieving this kind of capacitance with MLCCs at 60V to reduce the height not only requires quite a lot of area but also the cost is very significant. Also the electrolytics are commonly a reliability issue.

Is there a proposed inrush limitting strategy when connecting the large capacitance bank to the battery?

Would it be possible that you test the evaluation module with my proposed passive components?

Ci = 15uF, Co = 18uF, L = 22uH

Vbat = 40V to 58.8V

ibat = 0.2A to 10A

Vin = 48V

I know TI's design team is excellent and you put a lot of thought on the system implications of your design so could you explain why is such a large capacitor required from a system perspective (not talking about this IC in particular)?

Regards

Hi Nicolas,

We are not equipped to test under your conditions. I will provide the link to the evaluation module if you would like to order an EVM and test those conditions yourself, but we do not warranty operation of the device outside of the recommended operating conditions in the datasheet.

• BQ25856EVM Evaluation board | TI.com

With regard to inrush limiting, we have load switches available that will ramp up current slowly, but I do not know if the current limits of these devices will work for your input conditions.

• http://www.ti.com/loadswitches

Additionally, this Application Note has another alternative using discrete MOSFETs and then compares the method to using an integrated load switch solution:

• Integrated Load Switches Versus Discrete MOSFETs (Rev. A)

Regarding your question about the large capacitance, I believe you are talking about the capacitance on the input of our charger ICs. We need capacitance on our inputs for stability. We have a few control loops that are specific to the input. We add features to our devices like Dynamic Power Management (IINDPM, VINDPM) that need a control loop, and we anticipate a parasitic inductance on the input power cables. The minimum capacitance will keep the devices stable under these types of conditions.

Best,
Michael

Hi Michael,

But then, if these modes are not used, then the large capacitance isn't needed? Then the converter will not be able to work bidirectionally?

Additionally, could you please suggest an alternative battery charger IC that does not require a large in/out capacitance? I'm looking for a buck boost controller. I can add an external driver.

I have checked BQ25856QWRRVRQ1, BQ25751, BQ25750, BQ25756 but all of them require large Cs.