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LM74910-Q1: SLEEP OCP at startup

Adam B.
Prodigy 30 points
Part Number: LM74910-Q1

Tool/software:

Hello,

I am using the LM74910 in the following design, the goal is to disable the sleep mode at startup in order to charge the 6.6 mF capacitors and then, when the 24V_BOARD reaches IN_24V - Vgs_th, the sleep pin goes to 0v.

This allows to charge the capacitors and go to sleep mode right after that.

The problem with this design is that, in case of OCP when the sleep mode is disabled, something goes wrong with the LM74910 and it never shuts off the HGATE again, even when it's in sleep mode - OCP - OVP.

Any ideas why the IC fails with this design ?

THanks !

  • 0
    TI__Mastermind 46540 points

    Hi Adam,

    Have you faced an issue regarding this yet? Or is it just a concern?

    During charging of bulk capacitors, if anything goes wrong, like overcurrent or overvoltage, LM74910 will protect the downstream. 

    Now the question arises what if the controller itself damages? To cater this, during the validation phase, all the corner cases have to be taken care of such that controller's abs-max ratings are not violated.

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Prodigy 30 points

    Hello Shiven,

    I actually faced this problem and I found out that the problem was that the Q3 failed and the source, gate and drain were shorted.

    I will update this design in order to use MOSFETs that can handle a continuous 10A short circuit.

    However, i have a question regarding the OCP, OVP and UVLO faults : when nSLEEP is pulled high and one of these faults happens, does toggling nSLEEP resets the Ctmr ?

    Thanks,

    Adam,

  • 0 in reply to Adam B.
    TI__Mastermind 46540 points

    Hello Adam,

    Toggling nSLEEP means going to low Iq state and coming back to high Iq state. When nSLEEP is toggled, it will reset Ctmr also. 

    Regards,

    Shiven Dhir