Tool/software:
Hi Ti E2E,
I would like to know the correct configuration for the LP8863 when UVLO and Vsense Function are not used when the IC is not connected to Vin rail.
UVLO, Pin 35
Vsense_N, Pin 3
Vsense_P, Pin 4
A prior design has left UVLO open, disconnected, and Vsense_N and Vsense_P tied together but not tied to Vin rail.
Since the IC is not directly connected to Vin rail, this is a hybrid/ modified configuration with the FB pin driven with more current as to override the internal current sink.
Essentially this allows the IC to function normally, PWM controlled through I2C interface of the IC.
Please advise on the correctness of this configuration.
Thank you,
David