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TPS3424: RESET does not remain high

Part Number: TPS3424
Other Parts Discussed in Thread: TPS22917,

Tool/software:

Hi support team,
I have one question about the PPS3424A11C13ADRLR.

As attached, I have combined a push button controller (PPS3242A11C13ADRLR) and a load switch (TPS22917DBVR) to create a power switch peripheral circuit.
However, even when the button was pressed for the specified time, there was no continuity between VIN and VOUT of the TPS22917.

When I checked the output voltage of the RESET pin, it did not go high even when the button was pressed for the specified time, and only a pulse is output, as shown in the figure.
So could you please let me know why the RESET pin does not go high even when PB is pressed for the specified time, and how to solve this problem?

Regards,
Dice-K

  • Hi Dice,

    Are there capacitors attached to the LPT and SPT pins? Since this is an adjustable variant, it is mandatory that there are capacitors attached to those pins.

    I have also validated this behavior on my EVM, if LPT and SPT are floating, RESET does not assert, with LPT and SPT capacitor attached, RESET asserts.

    Jesse 

  • Hi Jesse,
    Thank you for your reply.

    In the section below it says that if we leave the SPT of a version with programmable tSP floating, it will be set to 50ms.

    7.3.1.2 Push-Button Timing Programmability
    www.ti.com/.../tps3424.pdf

    8.2.1.2.2 Short Press Time (tSP) and Long Press Time (tLP) selection
    www.ti.com/.../tps3424.pdf

    Is this a typo?
    If so please correct it.

    Or is this behavior specific to preview products?

    Best regards,
    Dice-K

  • Hi Dice, 

    We will add more clarification on the datasheet.

    Jesse 

  • Hi Jesse,
    Thank you for your support.

    I attached 1nF capacitors to the SPT and LPT pins, but there was no improvement.
    I also tried attaching a 10nF capacitor, but all that happened was that a longer pulse was output after about 0.422×10 seconds than with the 1nF capacitor.

    What jumper settings did you use for your TPS3424EVM validation?
    Is it left as default, with no pull-up on the RESET output?

    www.ti.com/.../snvu899.pdf

    Best regards,
    Dice-K

  • Hi Dice, 

    For this device on the EVM,PPS3242A11C13ADRLR , you can have the SPT, header J3 floating, but LPT, header J4, had to be connected to a capacitor. So since the PPS3242A11C13ADRLR is a latched output device, the RESET will assert at the short press then if the button is continuously pushed after the initial assertion, the RESET will de-assert at the long press. If the button is released after the output assert, before the long press time, the RESET will latch asserted, for this device asserted=HIGH.  

    Also, just make sure that J1 is configured to PB-GND, PB to pull low when pressed. J9 configured for VDD-KILL, J7 floating and J8 and J6 shorted. 

    I have validated multiple combination of SPT and LPT capacitor. Also with SPT floating and all the LPT configuration.

    Is it left as default, with no pull-up on the RESET output?

    The PPS3242A11C13ADRLR has a push-pull RESET output, so no pull up resistor needed. INT on the other hand is an open-drain.

    Jesse 

  • Hi Jesse,
    Thank you for your support.

    I have understood as follows.

    The SPT pin can be floated.
    The LPT pin cannot be floated.
    The LP time must be set longer than the SP time.

    「If the pin is left floating, the device defaults to fixed timer of 50msec.」
    「Make sure tLP is greater than tSP for proper device operation.」

    Best regards,
    Dice-K

  • Hi Dice,

    Yes, your understanding is correct.

    Jesse