BQ25798: VSYS load current impacts charge termination current

Hi Jeff,

I haven't seen this before. Any chance you can probe a current probe on IBUS?  There is an known issue where the charger bounces between DCM and CCM around this input current range when PFM is off.  If you don't have a current probe, we can look at SW1 because in DCM the low side FET doesn't turn and the charger rides the body diode.  Also, you can try turning on PFM and see that that helps.

Regards,

Jeff

Hi Jeff—thank you for the rapid feedback. I can't get hold of a current probe quickly, but I measured the following waveform at SW1:

It holds steady at 1.5 MHz, and doesn't seem to be entering DCM. SW2 holds steady at VREG. The BQ25798 registers at the time of the measurement appear as follows, with IBAT = 444 mA < ITERM = 480 mA:

     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00: 02 01 b8 01 f4 24 01 2c 8c 0c 03 00 dc 4b 3d a2
10: 80 00 10 01 14 aa c0 7a 55 01 2c 0f 90 01 00 00
20: 00 00 00 80 00 00 00 00 ff c7 7f 1f ff fc 80 00
30: 00 01 84 01 bc 2e fc 2e f6 2e e9 11 37 11 4f 02
40: 52 00 38 00 13 00 30 00 19 ff ff ff ff ff ff ff

I did try re-enabling PFM mode for grins, but there was no change—I think this load current is too high. PFM mode is not an option for us anyway; it has been disabled for the reason described in this thread.

I've since reproduced this issue on every sample I've tried (4 so far)—as far as I can tell, the issue corresponds to the load current on VSYS. We're in the process of evaluating a new revision to our design, which adds some additional load on VSYS—it may explain why we haven't seen this issue before.

This issue is a blocker for us—is there anything else we can check? We can potentially disable or reduce the load during charging, but I imagine the load current for which this phenomenon is guaranteed not to happen may be difficult to predict.

In the absolute worst case, we can set EN_TERM = 0 and make the BQ40Z50 the arbiter of charge termination—however, this would involve a change to the gas gauge's flash, and it's an inopportune time to do so.

On a related note—can you share more details about the CCM/DCM issue with PFM mode disabled? Is there anything we should be aware of, or possibly work around?

Thanks again for your continued support—in case I can provide any additional information, please let me know.

Hi Jeff,

I am bit puzzled as I haven't had any complaints about termination current set this high.  I have had complaints with termination current set down below 120mA.  I will schedule some bench time to look at this.  Can you remind me if you placed the 0.1uF SYS to GND capacitor as recommended in the datasheet?  The current sense amp that measures charge current is very noise sensitive.  To that end, I am curious what the charger's ADC reports for charge current?  Is it accurate?  The ADC uses the same current sense amp as the ICHG loop and termination comparator.  Another option might be to lower the charge current register setting below 1A once the current has tapered below 1A.  ICHG set < 1A makes the battery FET more resistive and therefore gives a more accurate current measurement.  This has worked for others who wanted ITERM <120mA. 

I do not recommend disabling termination and using the BQ40Z50 charge FET to terminate.  When EN_TERM=0, BAT OVP threshold drops from 105%*VREG to VREG itself.  This can result in oscillating in and out of charge, term, OVP, recharge.  You could use the BQ40Z50 current measurement to look for termination and then have the software disable charge.  But that might require changing the 40Z firmware.

The CCM/DCM is essentially a due to there being no hystersis getting in/out of each.  So there is a narrow input current range (175-250mA) where the charger essentially has a modal (as opposed to small signal) oscillation in/out of CCM and DCM.  Your power level is higher than that and waveform proves it.

Regards,

Jeff

Hi Jeff—thank you for the update! Owing to your gracious help, I think we've solved this one (more on that in a bit). But first, in response to your feedback:

Jeff F said:

Can you remind me if you placed the 0.1uF SYS to GND capacitor as recommended in the datasheet?

I can confirm this capacitor is present, and highlighted below:

We cannot place any components on the bottom side due to mechanical constraints, hence this capacitor being on top and near the DUT.

Jeff F said:

To that end, I am curious what the charger's ADC reports for charge current?  Is it accurate?

The ICHG reported by the BQ25798 (registers 0x33–0x34) and the BQ40Z50 (SBS command 0x0A) always seem to agree with one another within 5%, with the BQ40Z50 known to be a bit high as these packs are not calibrated on a per-sample basis yet.

Jeff F said:

Another option might be to lower the charge current register setting below 1A once the current has tapered below 1A.

I lowered the charge current to 800 mA (registers 0x03–0x04 = 0x0050), but the behavior remained the same; CHG_STAT remained 3'b100 (CV mode) while charging current continued to fall toward 400 mA. I removed and re-inserted the USB-C charger in case restarting the charging cycle might make a difference, but the behavior reproduced immediately.

We have a couple different means to control illumination here—the first is a very crude PWM method in which the entire LED strings are rapidly turned on and off, resulting in a lot of trash placed on VSYS. The second is a constant-current LED driver, the latter of which hadn't been exercised yet as the FW isn't fully ready.

Still suspecting that this issue is indeed noise related, I switched the control source to the constant-current LED driver, and the problem is solved—ICHG falls from 0x1df (479 mA) to 0x1d5 (469 mA), and then to zero. This was with the charging current limit restored to 5 A—interestingly enough, the termination threshold was a bit farther off (428 mA) with the charging current limit lowered to 800 mA.

It seems we are out of the woods now—to close out a few other topics for posterity:

Jeff F said:

I do not recommend disabling termination and using the BQ40Z50 charge FET to terminate.

I am aligned with you; this would have been relatively painful to implement at this stage anyway.

Jeff F said:

You could use the BQ40Z50 current measurement to look for termination and then have the software disable charge.  But that might require changing the 40Z firmware.

This would have been a viable workaround, and would not have required any changes to the BQ40Z50 flash in our particular case.

Jeff F said:

The CCM/DCM is essentially a due to there being no hystersis getting in/out of each.  So there is a narrow input current range (175-250mA) where the charger essentially has a modal (as opposed to small signal) oscillation in/out of CCM and DCM.

It seems that our input current may fall into the high end of this range during some idle conditions—even though we didn't see it here, maybe it would occur across P/V/T. What kind of system-level behavior would we see if this issue were to occur?