TPSM41625: Stacked configuration not working

Hi Shruti,

A response will be posted this week.

Thanks,

Calan

Hi Shruthi

Apologies for the delay, will get back to you tomorrow EOD Dallas time

Thankyou

Savith

Hi Shruthi

can you try these two cases

1.remove both R1419 and and R1430 and short RAMP_SEL tp Gnds on both phases

2. Remove R1419, R1430 and R1427 and short RAMP_SEL to Gnds on both phases

 can you also probe SW and Vout and provide layout, add bp5 and sync, ishare vshare, also look at pin straps during power up 

Thank you

Savith

Hello Savith,

We have tried both cases but no result. We could not probe the pins. In another similar circuit in our board, Gowtham has visited our lab on Friday and suggested to remove SS Pin resistor and RAMP_SEL Pin resistor. He has suggested to short the output of both TPSM41625 device through wire as we have removed the Fuse to isolate the FPGA. In this case, the circuit worked and the output is 0.826 V. But, we are expecting 0.85 V. We are still debugging the R2_VCC_0V85 rail.

Thanks & Regards,

Shruti

HI Shruthi

thank you for your feed back and will get back to you tomorrow

Thank you

Savith

Hi Shruthi

by removing the RAMP resistor and connecting the RAMP SEL to GND selects the internal 78.7kohm resistor for ramps as recommended in table 7.3 of datasheet and removing the ss resistor makes the soft start time 4ms 

where are you probing the Vout , is it at the regulation point or away from the regulation point?

Thank you

Savith