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UCC21750: FLT false trigger when EN is low

Liang Yan
Prodigy 10 points
Part Number: UCC21750

Tool/software:

Hi TI team, we use UCC21750 to drive SiC MOSFET. In one of the operating modes, SiC FETs are not operating. So we disable the the driver by set EN to low. However, FLT pin can go low to trigger fault during the operation. To debug this issue, we even short IN+/IN- to ground, and short DESAT to COM. But FLT still triggers. Is there a chance that this could happen by internal logic and what should we look into this issue? Thanks. -Liang

  • 0
    TI__Expert 8125 points

    Hi Liang,

    Can you please add additional details in terms of what gate driver operation exercised during the FLT low condition? (assuming no switching as EN, INP are low)

    if we have to reproduce this issue, what needs to be done? Is there any temp testing involved?

    waiting for your inputs.

    Thanks

    Sasi

  • 0 in reply to Sasikala Thangam
    Prodigy 10 points

    HI Sasi,

     This application is a bi-directional DC/DC conversion. UCC21750 is used to drive the primary side full-bridge topology.

    During forward operation, UCC21750 actively drives the primary side switches. It functions as specified by datasheet.

    During reverse operation, primary side switches are off. Their FET body diodes are part of rectification path.

     The FLT happens during the reverse operation when power level is above ~50% power level. To reproduce the issue, we simply run reverse operation at high power level. It will show up without exception. Since primary side switches do not need to drive, we set EN to low. But FLT is pulled down during the operation, seems in a randomly manner, could be 5 seconds after operation, or 5 minutes.

     To debug, we set EN to low, also tie IN+/IN-/GND together. According to the datasheet, if input is low, DESAT fault should not happen. But FLT is still triggered, which we need advice what to investigate.

     

    Thank you,

    Liang

  • 0 in reply to Liang Yan
    TI__Expert 8125 points

    Hi Liang,

    We are aware of a condition where system switching noise is high, it may create false FLT, even when INP=Low. I will take this conversation to email as we have to discuss about new part which is not released yet.

    I will send an email shortly.

    Thanks

    Sasi