Tool/software:
Hi,
We have UCC5870-Q1 in a batch of prototype 600V / 20A inverters driving a SiC Module. Our inverters have been runing well.
We have however seen a PWM_COMP_CHK_FAULT occurring randomly.
The fault occurs when:
1. FPGA and Inverter electronics are powered up, UCC5870 is configured per normal.
2. PWM is running, 50% Duty Cycle, center aligned PWM on all phases (essentially inverter is idle)
3. Ramp DC_BUS voltage up from 0 to 300V
4. PWM_COMP_CHK_FAULT Occurs.
Can TI assit with:
1. Is fault is related to the isolation barrier, and not something we are doing wrong, such as a PWM input anomaly from our FPGA. (example an ultra fast pulse or something)
2. Is the fault harmful to the system, can we potentionally inhibit it driving nFLT1 wihtout risk to our hardware?
3. Why would the fault trigger on rising DC bus voltage. During that time we are not switching any current.
Thanks.
