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UCC28704: Can this IC support 14V VDD input

Part Number: UCC28704

Tool/software:

Hi,

I am planning to use UCC28704 in flyback converter of 5W. Where my transformer aux winding voltage is 14V, can this PSR controller work with 14V VDD input as the datasheet says no min rating and max 35V. But I see for UVLO Vdd(on) threshold to be 21V typical. So will it work for me? 

Thanks for the help in advance.

  • As long as you can bias UCC28704 with another way for start up, like a resistor path to charge the VCC cap, it should work. Please note the Vcc cap needs to be sized properly too.

  • Thank you for replying. I have another doubt with respect to the bulk/ input capacitor. I tried using the same formula that is given in the IC datasheet (page 27) to compute the Cbulk value but the value I got is too high (around 340uF) but using actual flyback Cin formula with 5ms holdup time, the value is around 8uF. I also checked the value in the TI UCC28704 spreadsheet calculator, which is around 10uF. My doubt is why is it showing a huge value when used the formula in datasheet. Or in which case we should use the Cbulk formula in datasheet? 

    It will be very helpful if clarified. Thanks.

    My Vin= 85V~265V VAC, Fline_min=48Hz, this is what I get when using the same formula in datasheet.

  • Could be different assumption. What is the Vbulk.max in your equation?

  • Vbulk.max is sqrt(2)*Vin.max=~375V 

  • Hi I have stated my Vbulk.max viltage above. I still have doubt on the Cin value that is arrived with the IC datasheet formula.

  • Hello Kavitha, 

    Ning Tan is out-of office for this week. 
    I was supposed to cover for him, but I missed this one, and I apologize.

    The lower equation is the correct one for determining Cbulk (Cin_bulk_max). 

    I think the real questions are: what values are you using for VBulk.min and Vin_min?

    If I use Pin =5W, Vin_min = 85Vac, VBulk.min = 70V, then Cbulk = 8.1uF. 
    Add 20% for tolerance and Cbulk = 10.1uF. 

    Actually if Pout = 5W, then Pin must be higher, so Cbulk will be a bit higher, but that is not the point. The point is that the equation works, so one or more of the inputs was incorrect.  I suspect Vbulk.min is set too high which would result in a very large capacitance. 

    70Vdc is a typical value for Vbulk.min for flybacks with 85Vrms minimum input.  
    Hihger or lower Vbulk.min affects Cbulk, but also affects turns ratio.  
    Choose carefully. 

    Regards,
    Ulrich

  • Thank you very much for the clarification