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TPS2491: About Enable control of TPS2491

user1077147
Prodigy 95 points
Part Number: TPS2491

Tool/software:

Hello

The Enable pin of the TPS2491 is used to control the ON/OFF of 24V DC to the load.

The maximum current of the load is 66A.

I use three MOSFETs, 80V, 310A, 1.6mΩ, in parallel.

The problem is that when Enable is turned off, the FET burns out.

The questions are listed below.

1) Is it correct to use the Enable control while DC 24V is being supplied to turn the power supply to the load on and off?

（Unlike operation with hot plugging and unplugging, is it okay to use Enable control when DC24V is not disconnected?）

2）If the above is not the problem, please tell me the cause and solution. I have attached a circuit diagram.

3）If the TPS2491 cannot be used in the manner described above, please tell me of any alternative devices.

Thanks for the best reguard.

TPS2491.pdf

TPS2491.pdf

  • 0
    TI__Mastermind 39610 points

    We will get back to you tomorrow. 

  • 0 in reply to Avishek Pal
    Prodigy 95 points

    Hello,Avishek-san what is your opinion? I'm in a bit of a hurry.

  • 0 in reply to user1077147
    TI__Mastermind 39610 points
    user1077147 said:
    1) Is it correct to use the Enable control while DC 24V is being supplied to turn the power supply to the load on and off?

    TPS2491 ideally can be used to turn-off the load by pulling its ENABLE pin low.

    The schematic also looks fine. Please give me 1-2 days to think the possible root cause. 

    Is this damage repeatable? Can you please share the following signals during ENABLE based turn off?

    ENABLE, VOUT, Load current, GATE, TIMER

  • 0 in reply to Avishek Pal
    Prodigy 95 points

    thank you for your reply.

    I've experienced this twice so far, and it's reproducible.

    The EnablePin voltage is as follows:

    Enable: 2.1V

    Disable: 0.1V

    I did not observe the voltage on the Timer_ pin. There is 1000pF in it.

    The load side is a DC/DC converter that operates with an INPUT voltage of up to 8V.

    I am afraid of damaging the board due to burning,

    so I have attached the results of an evaluation using a DC/DC that operates up to an INPUT of 16V.

    Currently, Gate dv/dt start-up filter: 1KΩ and 1uF

    When switching from Enable to Disable, the current drops and then rises again for some reason.
    I think this is the cause of the FET burning out, is that correct?
    If you change the capacitance from 1uF to 0.1uF, the current will no longer rise again.
    Regarding the dv/dt start-up filter, I would appreciate your opinion on what it is necessary for, whether the behavior at 1uF and 0.1uF is correct, and whether changing to 0.1uF is the correct solution.
    If the dv/dt start-up filter is removed, the gate control will repeatedly turn on and off for a while when it is enabled, and then turn on normally.
    Therefore, I understand that it cannot be completely removed, but is that correct?

    2318.Waveform.xlsx

  • 0 in reply to user1077147
    TI__Mastermind 39610 points
    user1077147 said:

    Currently, Gate dv/dt start-up filter: 1KΩ and 1uF

    When switching from Enable to Disable, the current drops and then rises again for some reason.
    I think this is the cause of the FET burning out, is that correct?

    This is the reason for MOSFET damage. Cdv/dt capacitor is not fully discharged. Hence, the current tries to again rise up.

    user1077147 said:
    Regarding the dv/dt start-up filter, I would appreciate your opinion on what it is necessary for, whether the behavior at 1uF and 0.1uF is correct, and whether changing to 0.1uF is the correct solution.

    Usually, 10s of nF in the range of 10nF to 100nF is fine for Cdv/dt capacitor. However, please use the design calculator to find out the appropriate value of the Cdv/dt capacitor.

    www.ti.com/.../TPS2480-81-90-91-92-93_CALC

  • 0 in reply to Avishek Pal
    Prodigy 95 points

    Thank you, Avishek-san.

    I tried using a design calculator and came up with a value of 1uF.

    Attach a file.

    Set actual SS capacitance to 100nF.
    The actual dv/dt rate on Vout column and the SOA margin during start-up column are hatched in red.

    Set actual SS capacitance to 1000nF.
    The red hatching will be cleared.

    Does this calculator itself support the optimal value of SS capacitance under the power ON state Enable ON/OFF conditions?

    Please let me know if any of the parameters are incorrect.

    TPS249x_8x_Design_Calculator_REV_B_20231220_FDB0165N807L.xlsx

  • 0 in reply to user1077147
    TI__Mastermind 39610 points

    200nF may be used. Please check if 220nF works fine.

    Please see the below modified design calculator.

    TPS249x_8x_Design_Calculator_20231220_FDB0165N807L_Edited_TI.xlsx

    If this doesn't work, higher SOA MOSFET needs to be used. 

  • 0 in reply to Avishek Pal
    Prodigy 95 points

    Hello Avishek-san.

    Thank you for the recalculation.

    We were unable to procure the 200nF in time, so we decided to go ahead with 100nF.

    We checked the waveform by turning Enable on and off 700 times.

    The waveform at 100nF is shown below.

    When Enable is OFF, the current does not rise again.

    CH1 (yellow): DC24V INPUT
    CH2 (light blue): Voltage after FET
    CH3 (purple): Gate voltage
    CH4 (green): Current

    　　　　　Fig.1　Enable OFF waveform

    　Fig.2 Waveform when DC24V is turned on

    I see an inrush current of about 5.4A, but I don't think it's a problem. I think it will be reduced if I increase the capacitor capacity.

    I think the issue has been resolved thanks to you.
    Thank you very much.