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TPS543B20: LC double pole in Current mode control IC TPS543B20

Part Number: TPS543B20


Tool/software:

As we understand, this is a current mode control IC. But, the Frequency response of the buck converter we built shows a double pole at 17KHz, which coincides with the LC used. Even the excel design tool dowloaded from the website shows same response. Please clarify. we are facing serious phase margin issues. We are attaching the FR for various Rmode and Rramp. There is no much difference in the FR. The schematic is also attached.

  • Hello,

    A response will be posted next week.

    Thanks,

    Calan

  •  

    My apologies for the delayed response.

    As we understand, this is a current mode control IC. But, the Frequency response of the buck converter we built shows a double pole at 17KHz, which coincides with the LC used.

    Yes.  The Advanced Current Mode Control architecture inside the TPS543B20 uses a current emulation ramp to allow the converter to operate with much narrower duty cycles than conventional current mode control.  While this current emulation ramp provides similar performance to conventional current mode control, and dampens the LC resonance, it doesn't completely eliminate it, so there can be a visible resonance in the Gain and Phase versus frequency curves at the L-C resonance.

    We are attaching the FR for various Rmode and Rramp. There is no much difference in the FR.

    It is quite strange that you are not measuring a shift in the GAIN plot with respect to changes in the Rramp Resistor, as the Rramp resistor selects the ramp generating capacitor, which should be directly influencing the gain of the loop, so we would expect to see a significant shift in the gain between 75kΩ (which is not an Rramp selection resistor, but would likely program a Cramp of 6.23pF) Rramp = 120kΩ (Also not an Rramp selection resistor, but would likely program 8.91pF, and 187kΩ, which should select 14.1pF

    We would expect to see a 2x (6dB) shift in the gain plot between Cramp = 6.23pF and Cramp = 14.1pF, with the later generating a higher gain while the 6.23pF ramp would produce less gain.

    Some of the BODE plots for different RAMP resistors look like they are showing different peaking in the phase normally associated with the network analyzer operating at the switching frequency of the converter, which makes me wonder if it is possible that you were accidentally changing RT (R169) instead of Rramp (R171).

    That would explain what you are seeing shifts in the Phase plot by not the Gain plot as you were trying to change the Ramp value.

    we are facing serious phase margin issues.

    Your schematic does not show the full feedback connections, and also includes a common-mode filter inductor L13, in the remote sense path, what appears to be a 4mΩ resistor in the power delivery path (R158) in between two banks of 2x 47μF output capacitors.  Given the 17kHz LC resonance, I assume there is no other output capacitance since 450nH + 4x 47μF would give an LC resonance of 17kHz.

    However, I am concerned the the L13 inductor or the 4mΩ + 2x 47μF output filter are causing the low-phase at higher frequency.  The 4mΩ + 2x 47μF filter will start to add phase shift down at around 50kHz.

    I would recommend double checking which resistors you are changing for different compensation options as different R171 values should give you different Gain plots.

    I would also recommend checking to see if the R158 filter is resulting in the lower than expected loop phase.