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TPS65381A-Q1: nRES pin connection to microcontroller reset pin

Chetan Soni
Prodigy 80 points
Part Number: TPS65381A-Q1

Tool/software:

  • We have done our proto validation with Not using PMIC watchdog timer.

We are using PMIC with TMS570 LS914 controller 

  • We want to understand if we don't utilise the nREST reset capability what are the concerns.
  • Do we have any other option to workout watchdog capability by not using NREST pin.
  • If not used we we need it to be pulled to logic high?
  • 0
    Prodigy 80 points

    Awaiting response 

  • 0 in reply to Chetan Soni
    TI__Expert 4950 points

    Hi Chetan,

    If the NRESET is not used the main concerns would be safety related. For example, if the MCU hangs and can't continue operation, when using the WDT  with the NRESET pin the PMIC would reboot the MCU and the system could recover. The designer will have to decide if that is acceptable or not.

    The NRESET pin on the PMIC actually has to be configured to go low when an error is found on the WDT. You can evaluate the watchdog by reading the WD_STATUS register and SAFETY_STAT_2. 

     

    If you want the NREST pin to just be always high make sure that the WD_RST_EN bit is set to in the SAFETY_FUNC_CFG register.

    Best,

    Michael Hernandez

  • 0 in reply to Michael Hernandez
    Prodigy 80 points

    Thank you Michael for the response.

    What would be the optimum value of resistor to be used for NREST pin to Uc connection ?

    We are using below config

  • 0 in reply to Chetan Soni
    TI__Expert 4950 points

    Hi Chetan,

    I believe we don't recommend anything on the NRES line. The optimal resistor value here would depend on what it is trying to achieve. Is it there to limit the possible current or is there another purpose? Your current configuration should not negatively affect the operation.

    Best,

    Michael Hernandez 

  • 0 in reply to Michael Hernandez
    Prodigy 30 points

    Hi Michael,

    I'm working on hard reset functionality through the PMIC's WDT and resetting the MCU. I configured it in Q&A mode. The issue is after getting into infinite loop it resets the MCU, but I'm getting continuous reset signal from the PMIC. Because of this my MCU resets continuously. Is there a way to resolve the issue. I even tried setting the WD_RST_EN before going into hard reset. I have attached the scope shot of NRES pin for your reference. 

    .  

    Thanks,

    Subhash

  • 0 in reply to Michael Hernandez
    Prodigy 120 points

    Dear michael,

    thanks for the response for the issue raised.

    Their is r30 in between the trace from pmic(TPS65381A-Q1)to MCU(TMS5700914PGEQQ1)

    1) we can consider the resistor to be 0ohm populated ?

    2)If R30 is not populated/ left open will that cause an floating of pin and resetting of MCU?what are the concerns we face if r30 is not populated?

    Best regards,

    Navya.d

  • 0
    TI__Expert 4950 points

    Hi Subhash,

    Make sure that WD_RST_EN is 0 then oboserve the WD error count and make sure it goes to 0 before enabling this bit. If this bit is not enabled then the WD should not pull the reset line low.

    Hi Navaya,

    If the resistor is not populated and the circuit is left open then the PMIC will not be able to reset the MCU if something goes wrong such as the MCU hanging and needing to be rebooted. Depending on the application the system needing the ability to recover on its own may not be entirely necessary. The end system designer will have to make that determination. Now if the PMIC is not providing the voltage to the EN pin on the MCU the MCU will still typically require a pull up on that pin. 

    Hope this helps.

    Best,

    Michael Hernandez

  • 0 in reply to Michael Hernandez
    Prodigy 120 points

    Dear Michael,

    thanks for the response,want to ensure one more point -

    -Do RC ckt(r30=1k/0E,r13=10kohm and c27=10nF)time constant which is in microseconds  will impact  in reset of MCU repeatedly/flashing the MCU through jtag when watch dog timer is configured.

     

    Best regards,

    Navya.d

  • 0 in reply to navya diddi
    TI__Expert 4950 points

    Hi Navaya,

    Yes, capacitors on the reset line can cause issues if the PMIC is set to monitor the reset line. What happens is that as the reset line takes longer to come up the device checks the reset line, sees that the voltage is too low, assumes a fault condition, and tries to reset again in order to fix the issue. We typically recommend a maximum of 220pF on this line if a capacitor must be laced on the line. Hopefully this helps clear up the issue.

    Best,

    Michael Hernandez