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UCC15240-Q1: Calculation Tool Issue When Supply Amplifier

Part Number: UCC15240-Q1
Other Parts Discussed in Thread: UCC25800,

Tool/software:

Hi Team,

Customer uses it to supply amplifier, so there is no Qg and fsw, but seems calculation tool will produce a mistake under this condition, which is shown as below, could you please help double check it and provide a recommended value of Cout1b/2 & Rlim1/2? Thanks a lot.

BRs,

Francis

  • Hi Francis,

    Please expect a delay in responses due to US holiday.

    Thank you.  

  • Hi Team,

    Could you please reply it by today? Customer is urgently ask for it. Thanks.

    BRs,

    Francis

  • The "#DIV/0!" error means there is no value of RLIM that will be able to compensate for the charge imbalance coming from the requested Quiescent current entered into C17, C18. UCC15241 should not be considered as a dual output "power converter" since the capacitor midpoint is not a real GND but more considered a sort of virtual GND reference. This means that charge balance must be maintained between the VDD-COM and COM-VEE capacitors. A gate driver naturally maintains this balance (charge and discharge of gate capacitance) but when you propose a current of 100mA on 11.5V and 100mA on 5V, the RLIM cannot compensate. From testing I've done in the lab, the max current for VEE=5V is going to be something around 20mA-30mA.

    Steve

  • Hi Steven,

    Customer need a dual output power supply +5V and -5V, based on your comments, seems it cannot be solved for UCC15241? Could you please provide your professional advices and other choose here? Thanks a lot.

    BRs,

    Francis

  • Dual output +5V/-5V is not possible for MagMV at this power level. Maybe consider UCC25800?

    Steve

  • Hi Steven,

    Could you please help explain it again? Why we cannot use a Zener Diode to clamp the negative voltage here? The dual output is +11.5V & -5V, total VDD-VEE is 16.5V.

    BRs,

    Francis

  • Separate from the use of zener diode clamp, one concern is that 5V, 50mA is much higher COM-VEE power than I have tested and I am concerned about the possibility of shutdown due to thermal.

    Also, the use of a zener diode works when the output of a DC/DC module is a single output only and is then using a capacitor divider and the zener diode clamp is used to "regulate" the negative voltage (similar to the UCC25800 example schematic I shared).

    In the case of UCC15240-Q1, which also uses a split capacitor output but is regulating VDD-VEE and COM-VEE. The COM-VEE is the place where you would insert the zener clamp and the COM-VEE would be clamped by the zener voltage except that for UCC15240-Q1 the COM-VEE is regulated. For UCC15240-Q1, VDD-VEE is regulated, COM-VEE is regulated and VDD-COM is not directly regulated but is regulated by default that VDD-VEE and COM-VEE are regulated.

    My concern is that the load imbalance seen by VDD-COM to COM-VEE will be large enough to result in output UVLO latched fault. You could order the UCC14240-Q1 EVM and install UCC15240-Q1 and experiment with max COM-VEE power and VDD-COM to COM-VEE load balance.

    Steve

  • Hi Steven,

    I would like to further ask here, if the output power is not a problem(not so large to trigger UVLO), whether it is appropriate to use clamping diode(Zener) to generate positive and negative voltage without using RLIM- pin?

    BRs,

    Francis

  • This is an interesting proposal that I've not tested. First of all, zener clamps at such low current are not so accurate and if you are trying to avoid shutdown by clamping FBVxx, you need to clamp 2.5V - 10% so there is not enough FBVxx voltage window to work with (250mV). If you try and clamp VDD or VEE I don't think this will work because UCC15240 is using divided down feedback from VDD and VEE to regulate the voltage. If curious, try it on the UCC15240 EVM and let us know?

    Steve