LM25141-Q1: Bootstrap waveform: the inconsistency between the discharge time of bootstrap capacitor and the conduction time of upper MOSFET

Hi Shiv,

Can you please measure BST_SW and SW node or VDS of TOP MOSFET in single waveform? You can use differential probe for BST_SW and usual passive probe for SW_GND to measure both of them simultaneously. It would be helpful to compare the waveforms.

Thanks

Arpita

Thanks for your advice. I will check it later and then reply to you for confirm. And I also have another two questions:

1) Based on the EVM board: DEMB mode, Vin pin =12V, FB pin is connected to AGND for 5V output, f=2.2MHz. When I decrease the Vin pin to 3.8V, Vout decrease to 3.42V, the VCC is 3.78V (＞UVLO VCC).  I found that at this time, the switch operation still works with a time period of 3.4us instead of 0.45us (2.2MHz). Why the time period extends while the Vout fails to maintain 5V?

2) When I see the efficiency curve of DEMB mode in EVM guide, the Eff remains high for light load below 1A Iout but decreases sharply for Iout>1A (drops 10% from 1A to 5A).  I think when Iout increases, heat dissipation increases. Does the body diode of lower MOS still work throughout the whole Iout range? I was supposed that the DEMB mode only works when inductor current below zero and then come back to FPWM. Could you please confirm whether my thought is right or not.

Thanks for your kindly support!

Below:1) SW waveform or Vds of lower MOS when Vin=3.8V  2) Efficiency of DEMB mode

Hi Shiv,

1) At vin=3.8V<5v, the device being a buck converter, cannot output 5V when input is less than 5V. In such condition, Vout follows Vin [vin-drop] and min Toff is hit. With the decreasing of VIN, the duty cycle is increased to maintain the output voltage. When the duty cycle reaches near 100%, the on-time of the HS MOSFET can be extended with the effective switching frequency decreased (time period increased) To understand more about this, please go through Low Dropout Operation in a Buck Converter (Rev. A).

2) Yes your understanding is correct. In DEMB mode, the low-side MOSFET is disabled when only reverse current flow is detected i.e. during light load where inductor current hits zero. I will check internally for which Fsw the curves are given in EVM user guide for DEMB mode.

Meanwhile you can compare the efficiency across Iout for FPWM mode vs DEMB mode from D/S curves which are given for same test conditions.

Regards

Arpita

Thanks for your detailed answer. 

1) I've gone through the link about Low Dropout Operation in a Buck Converter (Rev. A). It is true that when Vin decreases (duty cycle reaches near 100%), the on time can be extended with lower switching frequency.

    ①I find that the minimum off-time is 100ns in the datasheet, does it mean that off-time will stick to 100ns as Vin drops to a certain value. You can see from the picture in my previous reply, the off time is around 240ns. This is the 1st point I am wondering.

    ②From the SW waveform, duty cycle can be calculated by 1-240ns/3400ns=93%. However, from Vin and Vout, the duty cycle is 3.42/3.8=90%, different from 93%. I am wondering if the D=Vout/Vin still works when Vin fails to maintain a 5V Vout?

2) In EVM guide, Fsw is also 2.2MHz for DEMB mode. It is interesting to compare the Efficiency curve between datasheet and EVM guide. In datasheet, the efficiency increases for heavy load while dropping sharply in EVM guide. Both of them works under 2.2MHz/5V Vout/DEMB mode. Is there anything that I ignore and why the trend differs obviously?

 Really thanks for your patient answer!

Hi Siv,

I have tested on the EVM: Vin=3.8V, vout_Set=5V [default EVM], fsw_set=2.2MHz. I have shared the results with you offline.

1) Toff_min from IC side should be ~100ns.The low time on SW node counts the MOSFET switching delays+ Delay due to driver slew rate control as well. I have observed Ton=3.17us, Toff=205us.

2) I have observed for Vin=3.8V, Vout=3.5682V. If you calculate the duty, vout/Vin=93.9%, Ton/(Ton+Toff)=93.92%.

I would recommend measuring the parameters more accurately to avoid confusion. For accurate Measurment of Vin and Vout, please measure right across input and output ceramic capacitors. Avoid long wire in measurement/ probing as these can incur losses.

As I have advised, please follow D/S curves. I will check internally about curves given in EVM. It might take couple of days. However you can measure the efficiency on EVM for your reference. Kindly follow the accurate measurement methods for the same.

Regards

Arpita

Hi Arpita,

1) Thanks for your test. I think it is my measurement method cause the confusion. I will double check.

2) Actually, I have measured the Efficiency curve of EVM board, the trend is the same (different from datasheet). You can take it as a reference. 

Best Regards,

Siv Ma

Hi Siv,

Have you measured Vin, Vout across ceramic caps of input and output? I will measure in EVM and get back to you in couple of days.

However, for Vin=18V I can see you have only 3% difference from 1A to 5A.

Regards

Arpita

Hi Arptia,

The efficiency is for the whole EVM board, so the measurement is based on the Vin and Vout Pin. It is true that measurement on caps will be more accurate. I don't know in which way the EVM guide gets the input/output voltage to calculate efficiency.

Also, yes, for Vin=18V, only 3% difference from 1A to 5A, but 10% difference from 1A to 5A in EVM guide. For Vin=12V, almost 0% difference from 1A to 5A by my measurement, but 5% in EVM guide. (It is only my thought that the DEMB will come back to FPWM once there is no reverse inductive current, so the efficiency in high load under DEMB mode will be reasonable, from D/S)

Please let me know once you get your answer, really thanks!

Best Regards,

Siv Ma

Hi Arpita,

Is there any progress about the DEMB efficiency? Please let me know if there is any result. Really thanks!

Regards

Siv Ma